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-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/1728-Address-code-warnings-style.patch128
1 files changed, 128 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/1728-Address-code-warnings-style.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/1728-Address-code-warnings-style.patch
new file mode 100644
index 00000000..03f8f58b
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/1728-Address-code-warnings-style.patch
@@ -0,0 +1,128 @@
+From 765ac461de105d9dd41b6e776d3f0c79be8c3585 Mon Sep 17 00:00:00 2001
+From: Kent Russell <kent.russell@amd.com>
+Date: Mon, 26 Jun 2017 08:34:02 -0400
+Subject: [PATCH 1728/4131] Address code warnings/style
+
+With Jenkins not properly performing checkpatch, a couple things got
+through. Clean those up
+
+Change-Id: Iddd0033bf17f9a905004ba2fe9183b4e8fe31d8b
+Signed-off-by: Kent Russell <kent.russell@amd.com>
+
+ Conflicts:
+ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 14 +++++++++-----
+ drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c | 9 ++++++---
+ drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 6 ++++--
+ 3 files changed, 19 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+index b892044..51fd0ed 100755
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+@@ -113,6 +113,7 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
+ {
+ int i;
+ int last_valid_bit;
++
+ if (adev->kfd) {
+ struct kgd2kfd_shared_resources gpu_resources = {
+ .compute_vmid_bitmap = global_compute_vmid_bitmap,
+@@ -122,7 +123,8 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
+ };
+
+ /* this is going to have a few of the MSBs set that we need to
+- * clear */
++ * clear
++ */
+ bitmap_complement(gpu_resources.queue_bitmap,
+ adev->gfx.mec.queue_bitmap,
+ KGD_MAX_QUEUES);
+@@ -136,7 +138,8 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
+ gpu_resources.queue_bitmap);
+
+ /* According to linux/bitmap.h we shouldn't use bitmap_clear if
+- * nbits is not compile time constant */
++ * nbits is not compile time constant
++ */
+ last_valid_bit = 1 /* only first MEC can have compute queues */
+ * adev->gfx.mec.num_pipe_per_mec
+ * adev->gfx.mec.num_queue_per_pipe;
+@@ -382,11 +385,12 @@ uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
+ uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
+ {
+ struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
++
++ /* the sclk is in quantas of 10kHz */
+ if (amdgpu_sriov_vf(adev))
+ return adev->clock.default_sclk / 100;
+- else
+- /* The sclk is in quantas of 10kHz */
+- return amdgpu_dpm_get_sclk(adev, false) / 100;
++
++ return amdgpu_dpm_get_sclk(adev, false) / 100;
+ }
+
+ void get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info)
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c b/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c
+index 8acdfcd..bf390b3 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c
+@@ -662,7 +662,8 @@ static int dbgdev_wave_control_diq(struct kfd_dbgdev *dbgdev,
+ pr_debug("\t\t mode is: %u\n", wac_info->mode);
+ pr_debug("\t\t operand is: %u\n", wac_info->operand);
+ pr_debug("\t\t trap id is: %u\n", wac_info->trapId);
+- pr_debug("\t\t msg value is: %u\n", wac_info->dbgWave_msg.DbgWaveMsg.WaveMsgInfoGen2.Value);
++ pr_debug("\t\t msg value is: %u\n",
++ wac_info->dbgWave_msg.DbgWaveMsg.WaveMsgInfoGen2.Value);
+ pr_debug("\t\t vmid is: N/A\n");
+
+ pr_debug("\t\t chk_vmid is : %u\n", reg_sq_cmd.bitfields.check_vmid);
+@@ -769,7 +770,8 @@ static int dbgdev_wave_control_nodiq(struct kfd_dbgdev *dbgdev,
+ vmid = pdd->qpd.vmid;
+ reg_sq_cmd.bits.vm_id = vmid;
+
+- pr_debug("\t\t %30s\n", "* * * * * * * * * * * * * * * * * *");
++ pr_debug("\t\t %30s\n",
++ "* * * * * * * * * * * * * * * * * *");
+
+ pr_debug("\t\t mode is: %u\n", wac_info->mode);
+ pr_debug("\t\t operand is: %u\n", wac_info->operand);
+@@ -806,7 +808,8 @@ static int dbgdev_wave_control_nodiq(struct kfd_dbgdev *dbgdev,
+ pr_debug("\t\t sbw is : %u\n",
+ reg_gfx_index.bitfields.sh_broadcast_writes);
+
+- pr_debug("\t\t %30s\n", "* * * * * * * * * * * * * * * * * *");
++ pr_debug("\t\t %30s\n",
++ "* * * * * * * * * * * * * * * * * *");
+
+ dbgdev->dev->kfd2kgd
+ ->wave_control_execute(dbgdev->dev->kgd,
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+index b725a9b..f1b8eab 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+@@ -305,7 +305,8 @@ static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q)
+
+ set = false;
+
+- for (pipe = dqm->next_pipe_to_allocate, i = 0; i < get_pipes_per_mec(dqm);
++ for (pipe = dqm->next_pipe_to_allocate, i = 0;
++ i < get_pipes_per_mec(dqm);
+ pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) {
+
+ if (!is_pipe_enabled(dqm, 0, pipe))
+@@ -903,7 +904,8 @@ static int set_sched_resources(struct device_queue_manager *dqm)
+
+ /* This situation may be hit in the future if a new HW
+ * generation exposes more than 64 queues. If so, the
+- * definition of res.queue_mask needs updating */
++ * definition of res.queue_mask needs updating
++ */
+ if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) {
+ pr_err("Invalid queue enabled by amdgpu: %d\n", i);
+ break;
+--
+2.7.4
+