diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/1645-drm-amdgpu-Vega10-Program-PAGE_TABLE_END_ADDR_HI32.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/1645-drm-amdgpu-Vega10-Program-PAGE_TABLE_END_ADDR_HI32.patch | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/1645-drm-amdgpu-Vega10-Program-PAGE_TABLE_END_ADDR_HI32.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/1645-drm-amdgpu-Vega10-Program-PAGE_TABLE_END_ADDR_HI32.patch new file mode 100644 index 00000000..e7a86e00 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/1645-drm-amdgpu-Vega10-Program-PAGE_TABLE_END_ADDR_HI32.patch @@ -0,0 +1,49 @@ +From f91ab53a4625820d3cab37a403f5ea3723e8f278 Mon Sep 17 00:00:00 2001 +From: Felix Kuehling <Felix.Kuehling@amd.com> +Date: Tue, 28 Mar 2017 21:03:43 -0400 +Subject: [PATCH 1645/4131] drm/amdgpu: Vega10: Program + PAGE_TABLE_END_ADDR_HI32 + +With 4-level page tables, the address space can be up to 256TB, which +requires more than 32-bit in the page tabe size (in pages). max_pfn will +become uint64_t in a pending amdgpu change. + +Change-Id: I549c0666e5c12a255931e05dec07e471c4752125 +Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c +index 7fa36f77..c109244 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c +@@ -1121,8 +1121,10 @@ static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid, + WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32) + (vmid*2), 0); + WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32) + (vmid*2), 0); + +- WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32) + (vmid*2), adev->vm_manager.max_pfn - 1); +- WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32) + (vmid*2), 0); ++ WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32) + (vmid*2), ++ lower_32_bits(adev->vm_manager.max_pfn - 1)); ++ WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32) + (vmid*2), ++ upper_32_bits(adev->vm_manager.max_pfn - 1)); + + WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) + (vmid*2), lower_32_bits(base)); + WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) + (vmid*2), upper_32_bits(base)); +@@ -1130,8 +1132,10 @@ static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid, + WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32) + (vmid*2), 0); + WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32) + (vmid*2), 0); + +- WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32) + (vmid*2), adev->vm_manager.max_pfn - 1); +- WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32) + (vmid*2), 0); ++ WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32) + (vmid*2), ++ lower_32_bits(adev->vm_manager.max_pfn - 1)); ++ WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32) + (vmid*2), ++ upper_32_bits(adev->vm_manager.max_pfn - 1)); + + WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) + (vmid*2), lower_32_bits(base)); + WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) + (vmid*2), upper_32_bits(base)); +-- +2.7.4 + |