diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/1088-drm-amd-display-add-pipe-locking-before-front-end-pr.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/1088-drm-amd-display-add-pipe-locking-before-front-end-pr.patch | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/1088-drm-amd-display-add-pipe-locking-before-front-end-pr.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/1088-drm-amd-display-add-pipe-locking-before-front-end-pr.patch new file mode 100644 index 00000000..83ad2c49 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/1088-drm-amd-display-add-pipe-locking-before-front-end-pr.patch @@ -0,0 +1,79 @@ +From fdd3c47bba51f5cf05c95be5377dc9fbc4a3eb26 Mon Sep 17 00:00:00 2001 +From: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Date: Fri, 24 Nov 2017 17:26:28 -0500 +Subject: [PATCH 1088/4131] drm/amd/display: add pipe locking before front end + programing + +Add pipe locking/unlocking before we program the front end + +Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> +--- + .../amd/display/dc/dce110/dce110_hw_sequencer.c | 35 ++++++++++++++++++---- + 1 file changed, 30 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +index e590f9d..a0e0b6d 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +@@ -2618,16 +2618,19 @@ static void dce110_apply_ctx_for_surface( + int num_planes, + struct validate_context *context) + { +- int i, be_idx; ++ int i; + + if (num_planes == 0) + return; + +- be_idx = -1; + for (i = 0; i < dc->res_pool->pipe_count; i++) { +- if (stream == context->res_ctx.pipe_ctx[i].stream) { +- be_idx = context->res_ctx.pipe_ctx[i].stream_res.tg->inst; +- break; ++ struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; ++ struct pipe_ctx *old_pipe_ctx = &dc->current_context->res_ctx.pipe_ctx[i]; ++ ++ if (stream == pipe_ctx->stream) { ++ if (!pipe_ctx->top_pipe && ++ (pipe_ctx->plane_state || old_pipe_ctx->plane_state)) ++ dc->hwss.pipe_control_lock(dc, pipe_ctx, true); + } + } + +@@ -2637,10 +2640,32 @@ static void dce110_apply_ctx_for_surface( + if (pipe_ctx->stream != stream) + continue; + ++ /* Need to allocate mem before program front end for Fiji */ ++ if (pipe_ctx->plane_res.mi != NULL) ++ pipe_ctx->plane_res.mi->funcs->allocate_mem_input( ++ pipe_ctx->plane_res.mi, ++ pipe_ctx->stream->timing.h_total, ++ pipe_ctx->stream->timing.v_total, ++ pipe_ctx->stream->timing.pix_clk_khz, ++ context->stream_count); ++ + dce110_program_front_end_for_pipe(dc, pipe_ctx); ++ ++ dc->hwss.update_plane_addr(dc, pipe_ctx); ++ + program_surface_visibility(dc, pipe_ctx); + + } ++ ++ for (i = 0; i < dc->res_pool->pipe_count; i++) { ++ struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; ++ struct pipe_ctx *old_pipe_ctx = &dc->current_context->res_ctx.pipe_ctx[i]; ++ ++ if ((stream == pipe_ctx->stream) && ++ (!pipe_ctx->top_pipe) && ++ (pipe_ctx->plane_state || old_pipe_ctx->plane_state)) ++ dc->hwss.pipe_control_lock(dc, pipe_ctx, false); ++ } + } + + static void dce110_power_down_fe(struct core_dc *dc, int fe_idx) +-- +2.7.4 + |