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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/0955-drivers-gpu-Use-ARRAY_SIZE-for-the-size-calculation-.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/0955-drivers-gpu-Use-ARRAY_SIZE-for-the-size-calculation-.patch37
1 files changed, 37 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0955-drivers-gpu-Use-ARRAY_SIZE-for-the-size-calculation-.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0955-drivers-gpu-Use-ARRAY_SIZE-for-the-size-calculation-.patch
new file mode 100644
index 00000000..03a91f86
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/0955-drivers-gpu-Use-ARRAY_SIZE-for-the-size-calculation-.patch
@@ -0,0 +1,37 @@
+From e50b8683499d4c23612a5c8444cca31f7e1c112d Mon Sep 17 00:00:00 2001
+From: Allen Pais <allen.lkml@gmail.com>
+Date: Wed, 13 Sep 2017 13:31:09 +0530
+Subject: [PATCH 0955/4131] drivers:gpu:Use ARRAY_SIZE() for the size
+ calculation of the array.
+
+Signed-off-by: Allen Pais <allen.lkml@gmail.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+index 74cb647..7ff7076 100644
+--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+@@ -273,7 +273,7 @@ static const struct pctl_data pctl0_data[] = {
+ {0x135, 0x12a810},
+ {0x149, 0x7a82c}
+ };
+-#define PCTL0_DATA_LEN (sizeof(pctl0_data)/sizeof(pctl0_data[0]))
++#define PCTL0_DATA_LEN (ARRAY_SIZE(pctl0_data))
+
+ #define PCTL0_RENG_EXEC_END_PTR 0x151
+ #define PCTL0_STCTRL_REG_SAVE_RANGE0_BASE 0xa640
+@@ -309,7 +309,7 @@ static const struct pctl_data pctl1_data[] = {
+ {0x1f0, 0x5000a7f6},
+ {0x1f1, 0x5000a7e4}
+ };
+-#define PCTL1_DATA_LEN (sizeof(pctl1_data)/sizeof(pctl1_data[0]))
++#define PCTL1_DATA_LEN (ARRAY_SIZE(pctl1_data))
+
+ #define PCTL1_RENG_EXEC_END_PTR 0x1f1
+ #define PCTL1_STCTRL_REG_SAVE_RANGE0_BASE 0xa000
+--
+2.7.4
+