diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/0854-drm-amd-amdgpu-excluded-HIQ-on-Carrizo.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/0854-drm-amd-amdgpu-excluded-HIQ-on-Carrizo.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0854-drm-amd-amdgpu-excluded-HIQ-on-Carrizo.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0854-drm-amd-amdgpu-excluded-HIQ-on-Carrizo.patch new file mode 100644 index 00000000..86da883f --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/0854-drm-amd-amdgpu-excluded-HIQ-on-Carrizo.patch @@ -0,0 +1,40 @@ +From 7c72efd4ba2bdbd75fb7b115e3ed534a04a0d182 Mon Sep 17 00:00:00 2001 +From: Sonny Jiang <sonny.jiang@amd.com> +Date: Thu, 1 Feb 2018 14:01:41 +0530 +Subject: [PATCH 0854/4131] drm/amd/amdgpu: excluded HIQ on Carrizo + +Enable HIQ + Enable IOMMU + GFX Powergating cause Merlin Falcon boot fail. +Enable HIQ is only for SRIOV, so skip it on CZ. + +Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> +Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c | 11 ++++++++--- + 1 file changed, 8 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c +index 309f241..d1a32be 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c +@@ -294,9 +294,14 @@ static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, + m = get_mqd(mqd); + + acquire_queue(kgd, pipe_id, queue_id); +- +- /* HIQ is set during driver init period with vmid set to 0*/ +- if (m->cp_hqd_vmid == 0) { ++ /*HIQ is set during driver init period with vmid set to 0. For SRIOV ++ * world switching support let the RLC know about the HIQ. ++ * ++ * Workaround: This causes reboots on CZ. Disable this on CZ, which ++ * doesn't support SRIOV anyway. ++ */ ++ if (m->cp_hqd_vmid == 0 && ++ adev->asic_type != CHIP_CARRIZO) { + uint32_t value, mec, pipe; + + mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; +-- +2.7.4 + |