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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/0771-drm-amdgpu-add-query-for-amdgpu-capability.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/0771-drm-amdgpu-add-query-for-amdgpu-capability.patch115
1 files changed, 0 insertions, 115 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0771-drm-amdgpu-add-query-for-amdgpu-capability.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0771-drm-amdgpu-add-query-for-amdgpu-capability.patch
deleted file mode 100644
index 280b7de1..00000000
--- a/common/recipes-kernel/linux/linux-yocto-4.14.71/0771-drm-amdgpu-add-query-for-amdgpu-capability.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From cd32b08237eb2fb1c5e80e0c8f11677e55c0b758 Mon Sep 17 00:00:00 2001
-From: Flora Cui <Flora.Cui@amd.com>
-Date: Thu, 11 Aug 2016 14:57:13 +0800
-Subject: [PATCH 0771/4131] drm/amdgpu: add query for amdgpu capability
-
-Change-Id: I19b3a6d706ab71fecd05e0e0a8260b24168f3fd6
-Signed-off-by: Flora Cui <Flora.Cui@amd.com>
-Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
-Signed-off-by: Kalyan Alle <kalyan.alle@amd.com>
-
- Conflicts:
- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
----
- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 2 +-
- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 12 ++++++++++--
- include/uapi/drm/amdgpu_drm.h | 18 ++++++++++++++++++
- 3 files changed, 29 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
-index 38db03f..4b23cc7 100644
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
-@@ -379,7 +379,7 @@ int amdgpu_gem_dgma_ioctl(struct drm_device *dev, void *data,
- args->handle = handle;
- break;
- case AMDGPU_GEM_DGMA_QUERY_PHYS_ADDR:
-- gobj = kcl_drm_gem_object_lookup(dev, filp, args->handle);
-+ gobj = drm_gem_object_lookup(filp, args->handle);
- if (gobj == NULL)
- return -ENOENT;
-
-diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
-index 34c2d1b..054b270 100644
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
-@@ -709,9 +709,17 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
- }
- }
- case AMDGPU_INFO_CAPABILITY: {
-+ struct drm_amdgpu_capability cap;
-+
-+ memset(&cap, 0, sizeof(cap));
- if (amdgpu_no_evict)
-- ui64 |= AMDGPU_CAPABILITY_PIN_MEM_FLAG;
-- return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;
-+ cap.flag |= AMDGPU_CAPABILITY_PIN_MEM_FLAG;
-+ if (amdgpu_direct_gma_size) {
-+ cap.flag |= AMDGPU_CAPABILITY_DIRECT_GMA_FLAG;
-+ cap.direct_gma_size = amdgpu_direct_gma_size;
-+ }
-+ return copy_to_user(out, &cap,
-+ min((size_t)size, sizeof(cap))) ? -EFAULT : 0;
- }
- case AMDGPU_INFO_SENSOR: {
- struct pp_gpu_power query = {0};
-diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
-index 16474c6..e19af02 100644
---- a/include/uapi/drm/amdgpu_drm.h
-+++ b/include/uapi/drm/amdgpu_drm.h
-@@ -55,6 +55,7 @@ extern "C" {
-
- /* hybrid specific ioctls */
- #define DRM_AMDGPU_FREESYNC 0x5d
-+#define DRM_AMDGPU_GEM_DGMA 0x5c
-
- #define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
- #define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
-@@ -73,6 +74,7 @@ extern "C" {
-
- /* hybrid specific ioctls */
- #define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
-+#define DRM_IOCTL_AMDGPU_GEM_DGMA DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_DGMA, struct drm_amdgpu_gem_dgma)
-
- #define AMDGPU_GEM_DOMAIN_CPU 0x1
- #define AMDGPU_GEM_DOMAIN_GTT 0x2
-@@ -245,6 +247,15 @@ struct drm_amdgpu_gem_userptr {
- __u32 handle;
- };
-
-+#define AMDGPU_GEM_DGMA_IMPORT 0
-+#define AMDGPU_GEM_DGMA_QUERY_PHYS_ADDR 1
-+struct drm_amdgpu_gem_dgma {
-+ __u64 addr;
-+ __u64 size;
-+ __u32 op;
-+ __u32 handle;
-+};
-+
- /* SI-CI-VI: */
- /* same meaning as the GB_TILE_MODE and GL_MACRO_TILE_MODE fields */
- #define AMDGPU_TILING_ARRAY_MODE_SHIFT 0
-@@ -633,6 +644,8 @@ struct drm_amdgpu_cs_chunk_data {
- #define AMDGPU_INFO_VIRTUAL_RANGE 0x51
- /* query pin memory capability */
- #define AMDGPU_CAPABILITY_PIN_MEM_FLAG (1 << 0)
-+/* query direct gma capability */
-+#define AMDGPU_CAPABILITY_DIRECT_GMA_FLAG (1 << 1)
-
- #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
- #define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
-@@ -912,6 +925,11 @@ struct drm_amdgpu_virtual_range {
- uint64_t end;
- };
-
-+struct drm_amdgpu_capability {
-+ __u32 flag;
-+ __u32 direct_gma_size;
-+};
-+
- /*
- * Definition of free sync enter and exit signals
- * We may have more options in the future
---
-2.7.4
-