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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/0603-drm-amd-display-Flattening-to-dc_transfer_func.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/0603-drm-amd-display-Flattening-to-dc_transfer_func.patch237
1 files changed, 237 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0603-drm-amd-display-Flattening-to-dc_transfer_func.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0603-drm-amd-display-Flattening-to-dc_transfer_func.patch
new file mode 100644
index 00000000..fa3484eb
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/0603-drm-amd-display-Flattening-to-dc_transfer_func.patch
@@ -0,0 +1,237 @@
+From 3d2ec9196a69ff6695976314b333ab9bd9627dfa Mon Sep 17 00:00:00 2001
+From: "Leo (Sunpeng) Li" <sunpeng.li@amd.com>
+Date: Mon, 10 Jul 2017 14:04:21 -0400
+Subject: [PATCH 0603/4131] drm/amd/display: Flattening to dc_transfer_func
+
+Flattening dc transfer functions in the following manner:
+transfer_func > core_transfer_func > dc_transfer_func
+
+References to deleted structs are updated as needed.
+
+Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Harry Wentland <Harry.Wentland@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/core/dc_surface.c | 19 ++++---------------
+ drivers/gpu/drm/amd/display/dc/dc.h | 10 ++++++----
+ .../drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 10 +++++-----
+ .../gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 10 +++++-----
+ drivers/gpu/drm/amd/display/dc/inc/core_types.h | 8 --------
+ 5 files changed, 20 insertions(+), 37 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
+index aa6ac95..d44ddfb 100644
+--- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
++++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
+@@ -45,18 +45,11 @@ struct gamma {
+ int ref_count;
+ };
+
+-struct transfer_func {
+- struct core_transfer_func protected;
+- int ref_count;
+-};
+-
+ #define DC_SURFACE_TO_SURFACE(dc_surface) container_of(dc_surface, struct surface, protected.public)
+ #define CORE_SURFACE_TO_SURFACE(core_surface) container_of(core_surface, struct surface, protected)
+
+ #define DC_GAMMA_TO_GAMMA(dc_gamma) \
+ container_of(dc_gamma, struct gamma, protected.public)
+-#define DC_TRANSFER_FUNC_TO_TRANSFER_FUNC(dc_tf) \
+- container_of(dc_tf, struct transfer_func, protected.public)
+ #define CORE_GAMMA_TO_GAMMA(core_gamma) \
+ container_of(core_gamma, struct gamma, protected)
+
+@@ -208,18 +201,14 @@ struct dc_gamma *dc_create_gamma()
+ return NULL;
+ }
+
+-void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf)
++void dc_transfer_func_retain(struct dc_transfer_func *tf)
+ {
+- struct transfer_func *tf = DC_TRANSFER_FUNC_TO_TRANSFER_FUNC(dc_tf);
+-
+ ASSERT(tf->ref_count > 0);
+ ++tf->ref_count;
+ }
+
+-void dc_transfer_func_release(const struct dc_transfer_func *dc_tf)
++void dc_transfer_func_release(struct dc_transfer_func *tf)
+ {
+- struct transfer_func *tf = DC_TRANSFER_FUNC_TO_TRANSFER_FUNC(dc_tf);
+-
+ ASSERT(tf->ref_count > 0);
+ --tf->ref_count;
+
+@@ -229,14 +218,14 @@ void dc_transfer_func_release(const struct dc_transfer_func *dc_tf)
+
+ struct dc_transfer_func *dc_create_transfer_func()
+ {
+- struct transfer_func *tf = dm_alloc(sizeof(*tf));
++ struct dc_transfer_func *tf = dm_alloc(sizeof(*tf));
+
+ if (tf == NULL)
+ goto alloc_fail;
+
+ ++tf->ref_count;
+
+- return &tf->protected.public;
++ return tf;
+
+ alloc_fail:
+ return NULL;
+diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
+index 42c1aa8..1fad03c 100644
+--- a/drivers/gpu/drm/amd/display/dc/dc.h
++++ b/drivers/gpu/drm/amd/display/dc/dc.h
+@@ -293,6 +293,8 @@ struct dc_transfer_func {
+ struct dc_transfer_func_distributed_points tf_pts;
+ enum dc_transfer_func_type type;
+ enum dc_transfer_func_predefined tf;
++ struct dc_context *ctx;
++ int ref_count;
+ };
+
+ struct dc_surface {
+@@ -310,7 +312,7 @@ struct dc_surface {
+ struct dc_hdr_static_metadata hdr_static_ctx;
+
+ const struct dc_gamma *gamma_correction;
+- const struct dc_transfer_func *in_transfer_func;
++ struct dc_transfer_func *in_transfer_func;
+
+ enum dc_color_space color_space;
+ enum surface_pixel_format format;
+@@ -384,8 +386,8 @@ void dc_gamma_retain(const struct dc_gamma *dc_gamma);
+ void dc_gamma_release(const struct dc_gamma **dc_gamma);
+ struct dc_gamma *dc_create_gamma(void);
+
+-void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
+-void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
++void dc_transfer_func_retain(struct dc_transfer_func *dc_tf);
++void dc_transfer_func_release(struct dc_transfer_func *dc_tf);
+ struct dc_transfer_func *dc_create_transfer_func(void);
+
+ /*
+@@ -465,7 +467,7 @@ struct dc_stream {
+
+ struct freesync_context freesync_ctx;
+
+- const struct dc_transfer_func *out_transfer_func;
++ struct dc_transfer_func *out_transfer_func;
+ struct colorspace_transform gamut_remap_matrix;
+ struct csc_transform csc_color_matrix;
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+index d3c84dc3..5d64611 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+@@ -242,7 +242,7 @@ static bool dce110_set_input_transfer_func(
+ const struct core_surface *surface)
+ {
+ struct input_pixel_processor *ipp = pipe_ctx->ipp;
+- const struct core_transfer_func *tf = NULL;
++ const struct dc_transfer_func *tf = NULL;
+ struct ipp_prescale_params prescale_params = { 0 };
+ bool result = true;
+
+@@ -250,7 +250,7 @@ static bool dce110_set_input_transfer_func(
+ return false;
+
+ if (surface->public.in_transfer_func)
+- tf = DC_TRANSFER_FUNC_TO_CORE(surface->public.in_transfer_func);
++ tf = surface->public.in_transfer_func;
+
+ build_prescale_params(&prescale_params, surface);
+ ipp->funcs->ipp_program_prescale(ipp, &prescale_params);
+@@ -262,8 +262,8 @@ static bool dce110_set_input_transfer_func(
+ /* Default case if no input transfer function specified */
+ ipp->funcs->ipp_set_degamma(ipp,
+ IPP_DEGAMMA_MODE_HW_sRGB);
+- } else if (tf->public.type == TF_TYPE_PREDEFINED) {
+- switch (tf->public.tf) {
++ } else if (tf->type == TF_TYPE_PREDEFINED) {
++ switch (tf->tf) {
+ case TRANSFER_FUNCTION_SRGB:
+ ipp->funcs->ipp_set_degamma(ipp,
+ IPP_DEGAMMA_MODE_HW_sRGB);
+@@ -283,7 +283,7 @@ static bool dce110_set_input_transfer_func(
+ result = false;
+ break;
+ }
+- } else if (tf->public.type == TF_TYPE_BYPASS) {
++ } else if (tf->type == TF_TYPE_BYPASS) {
+ ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS);
+ } else {
+ /*TF_TYPE_DISTRIBUTED_POINTS - Not supported in DCE 11*/
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+index 4c39bf0..ac0d62c 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+@@ -602,14 +602,14 @@ static bool dcn10_set_input_transfer_func(
+ struct pipe_ctx *pipe_ctx, const struct core_surface *surface)
+ {
+ struct input_pixel_processor *ipp = pipe_ctx->ipp;
+- const struct core_transfer_func *tf = NULL;
++ const struct dc_transfer_func *tf = NULL;
+ bool result = true;
+
+ if (ipp == NULL)
+ return false;
+
+ if (surface->public.in_transfer_func)
+- tf = DC_TRANSFER_FUNC_TO_CORE(surface->public.in_transfer_func);
++ tf = surface->public.in_transfer_func;
+
+ if (surface->public.gamma_correction && dce_use_lut(surface))
+ ipp->funcs->ipp_program_input_lut(ipp,
+@@ -617,8 +617,8 @@ static bool dcn10_set_input_transfer_func(
+
+ if (tf == NULL)
+ ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS);
+- else if (tf->public.type == TF_TYPE_PREDEFINED) {
+- switch (tf->public.tf) {
++ else if (tf->type == TF_TYPE_PREDEFINED) {
++ switch (tf->tf) {
+ case TRANSFER_FUNCTION_SRGB:
+ ipp->funcs->ipp_set_degamma(ipp,
+ IPP_DEGAMMA_MODE_HW_sRGB);
+@@ -638,7 +638,7 @@ static bool dcn10_set_input_transfer_func(
+ result = false;
+ break;
+ }
+- } else if (tf->public.type == TF_TYPE_BYPASS) {
++ } else if (tf->type == TF_TYPE_BYPASS) {
+ ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS);
+ } else {
+ /*TF_TYPE_DISTRIBUTED_POINTS*/
+diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+index 0308418..3e9a0cc 100644
+--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
++++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+@@ -49,9 +49,6 @@ struct core_stream;
+ #define DC_GAMMA_TO_CORE(dc_gamma) \
+ container_of(dc_gamma, struct core_gamma, public)
+
+-#define DC_TRANSFER_FUNC_TO_CORE(dc_transfer_func) \
+- container_of(dc_transfer_func, struct core_transfer_func, public)
+-
+ struct core_surface {
+ struct dc_surface public;
+ struct dc_surface_status status;
+@@ -63,11 +60,6 @@ struct core_gamma {
+ struct dc_context *ctx;
+ };
+
+-struct core_transfer_func {
+- struct dc_transfer_func public;
+- struct dc_context *ctx;
+-};
+-
+ void enable_surface_flip_reporting(struct dc_surface *dc_surface,
+ uint32_t controller_id);
+
+--
+2.7.4
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-19 19:17:04 +0000