diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/0323-drm-amd-display-Fill-in-vrefresh-and-min_vblank_time.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/0323-drm-amd-display-Fill-in-vrefresh-and-min_vblank_time.patch | 166 |
1 files changed, 0 insertions, 166 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0323-drm-amd-display-Fill-in-vrefresh-and-min_vblank_time.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0323-drm-amd-display-Fill-in-vrefresh-and-min_vblank_time.patch deleted file mode 100644 index fd4ed7ed..00000000 --- a/common/recipes-kernel/linux/linux-yocto-4.14.71/0323-drm-amd-display-Fill-in-vrefresh-and-min_vblank_time.patch +++ /dev/null @@ -1,166 +0,0 @@ -From 98d10a17677c1a40e379b070f736a29bca5ae663 Mon Sep 17 00:00:00 2001 -From: Jordan Lazare <Jordan.Lazare@amd.com> -Date: Thu, 30 Mar 2017 13:08:34 -0400 -Subject: [PATCH 0323/4131] drm/amd/display: Fill in vrefresh and - min_vblank_time for dce8/dce10 - -PPLib is now calling into DC to get vrefresh and min_vblank_time, but -since full bandwidth calcs are missing for those generations, the pplib -structures were never being filled. This change fills the currently -required fields to prevent screen corruption. - -Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> -Acked-by: Harry Wentland <Harry.Wentland@amd.com> -Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - .../drm/amd/display/dc/dce100/dce100_hw_sequencer.c | 21 +++++++++++++++++++++ - .../drm/amd/display/dc/dce100/dce100_hw_sequencer.h | 5 +++++ - .../drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 8 ++++---- - .../drm/amd/display/dc/dce110/dce110_hw_sequencer.h | 8 ++++++++ - .../drm/amd/display/dc/dce80/dce80_hw_sequencer.c | 2 ++ - 5 files changed, 40 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c -index bd8e19f..f11044e 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c -+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c -@@ -104,6 +104,26 @@ static bool dce100_enable_display_power_gating( - return false; - } - -+void dce100_pplib_apply_display_requirements( -+ struct core_dc *dc, -+ struct validate_context *context) -+{ -+ struct dm_pp_display_configuration *pp_display_cfg = &context->pp_display_cfg; -+ -+ pp_display_cfg->avail_mclk_switch_time_us = -+ dce110_get_min_vblank_time_us(context); -+ -+ dce110_fill_display_configs(context, pp_display_cfg); -+ -+ if (memcmp(&dc->prev_display_config, pp_display_cfg, sizeof( -+ struct dm_pp_display_configuration)) != 0) -+ dm_pp_apply_display_requirements(dc->ctx, pp_display_cfg); -+ -+ dc->prev_display_config = *pp_display_cfg; -+} -+ -+ -+ - static void set_displaymarks( - const struct core_dc *dc, struct validate_context *context) - { -@@ -116,6 +136,7 @@ static void set_bandwidth( - bool decrease_allowed) - { - dc->hwss.set_displaymarks(dc, context); -+ dce100_pplib_apply_display_requirements(dc, context); - } - - -diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h -index cf497ea..f51d04a 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h -+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h -@@ -29,8 +29,13 @@ - #include "core_types.h" - - struct core_dc; -+struct validate_context; - - bool dce100_hw_sequencer_construct(struct core_dc *dc); - -+void dce100_pplib_apply_display_requirements( -+ struct core_dc *dc, -+ struct validate_context *context); -+ - #endif /* __DC_HWSS_DCE100_H__ */ - -diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c -index 2a3a39e..839c344 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c -+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c -@@ -2097,7 +2097,7 @@ static void init_hw(struct core_dc *dc) - } - } - --static void fill_display_configs( -+void dce110_fill_display_configs( - const struct validate_context *context, - struct dm_pp_display_configuration *pp_display_cfg) - { -@@ -2146,7 +2146,7 @@ static void fill_display_configs( - pp_display_cfg->display_count = num_cfgs; - } - --static uint32_t get_min_vblank_time_us(const struct validate_context *context) -+uint32_t dce110_get_min_vblank_time_us(const struct validate_context *context) - { - uint8_t j; - uint32_t min_vertical_blank_time = -1; -@@ -2224,13 +2224,13 @@ static void pplib_apply_display_requirements( - = context->bw_results.required_sclk_deep_sleep; - - pp_display_cfg->avail_mclk_switch_time_us = -- get_min_vblank_time_us(context); -+ dce110_get_min_vblank_time_us(context); - /* TODO: dce11.2*/ - pp_display_cfg->avail_mclk_switch_time_in_disp_active_us = 0; - - pp_display_cfg->disp_clk_khz = context->dispclk_khz; - -- fill_display_configs(context, pp_display_cfg); -+ dce110_fill_display_configs(context, pp_display_cfg); - - /* TODO: is this still applicable?*/ - if (pp_display_cfg->display_count == 1) { -diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h -index a6b4d0d..52462c1 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h -+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h -@@ -30,6 +30,8 @@ - - #define GAMMA_HW_POINTS_NUM 256 - struct core_dc; -+struct validate_context; -+struct dm_pp_display_configuration; - - bool dce110_hw_sequencer_construct(struct core_dc *dc); - -@@ -58,5 +60,11 @@ void dce110_power_down(struct core_dc *dc); - - void dce110_update_pending_status(struct pipe_ctx *pipe_ctx); - -+void dce110_fill_display_configs( -+ const struct validate_context *context, -+ struct dm_pp_display_configuration *pp_display_cfg); -+ -+uint32_t dce110_get_min_vblank_time_us(const struct validate_context *context); -+ - #endif /* __DC_HWSS_DCE110_H__ */ - -diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c -index 85a54d9..9d4e7d8 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c -+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c -@@ -31,6 +31,7 @@ - - #include "dce/dce_hwseq.h" - #include "dce110/dce110_hw_sequencer.h" -+#include "dce100/dce100_hw_sequencer.h" - - /* include DCE8 register header files */ - #include "dce/dce_8_0_d.h" -@@ -118,6 +119,7 @@ static void set_bandwidth( - bool decrease_allowed) - { - dc->hwss.set_displaymarks(dc, context); -+ dce100_pplib_apply_display_requirements(dc, context); - } - - --- -2.7.4 - |