diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/0258-drm-amd-display-refclock-from-bios-firmwareInfoTable.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/0258-drm-amd-display-refclock-from-bios-firmwareInfoTable.patch | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0258-drm-amd-display-refclock-from-bios-firmwareInfoTable.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0258-drm-amd-display-refclock-from-bios-firmwareInfoTable.patch new file mode 100644 index 00000000..cf203860 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/0258-drm-amd-display-refclock-from-bios-firmwareInfoTable.patch @@ -0,0 +1,101 @@ +From e0d26bade16f70be29c3b90aebe2f4656ddb3712 Mon Sep 17 00:00:00 2001 +From: Charlene Liu <charlene.liu@amd.com> +Date: Thu, 2 Mar 2017 21:18:03 -0500 +Subject: [PATCH 0258/4131] drm/amd/display: refclock from bios + firmwareInfoTable + +Signed-off-by: Charlene Liu <charlene.liu@amd.com> +Acked-by: Harry Wentland <Harry.Wentland@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc.c | 10 +++++++++- + drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 2 +- + drivers/gpu/drm/amd/display/dc/dc_types.h | 1 + + drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 17 ++++++----------- + 4 files changed, 17 insertions(+), 13 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c +index 27e31bd..302a10c 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c +@@ -467,6 +467,8 @@ static bool construct(struct core_dc *dc, + else { + /* Create BIOS parser */ + struct bp_init_data bp_init_data; ++ struct firmware_info fw_info = { { 0 } }; ++ + bp_init_data.ctx = dc_ctx; + bp_init_data.bios = init_params->asic_id.atombios_base_address; + +@@ -479,7 +481,13 @@ static bool construct(struct core_dc *dc, + } + + dc_ctx->created_bios = true; +- } ++ ++ if (dc_ctx->dc_bios->funcs->get_firmware_info( ++ dc_ctx->dc_bios, &fw_info) == BP_RESULT_OK) { ++ dc->ctx->ref_clock_inKhz = fw_info.pll_info.crystal_frequency; ++ } else ++ ASSERT_CRITICAL(false); ++ } + + /* Create I2C AUX */ + dc_ctx->i2caux = dal_i2caux_create(dc_ctx); +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +index 4e1a933..365a19e 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +@@ -237,7 +237,7 @@ bool dc_stream_set_cursor_position( + struct input_pixel_processor *ipp = pipe_ctx->ipp; + struct dc_cursor_mi_param param = { + .pixel_clk_khz = dc_stream->timing.pix_clk_khz, +- .ref_clk_khz = 48000,/*todo refclk*/ ++ .ref_clk_khz = core_dc->ctx->ref_clock_inKhz, + .viewport_x_start = pipe_ctx->scl_data.viewport.x, + .viewport_width = pipe_ctx->scl_data.viewport.width, + .h_scale_ratio = pipe_ctx->scl_data.ratios.horz, +diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h +index 242dd7b..c428a02 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc_types.h ++++ b/drivers/gpu/drm/amd/display/dc/dc_types.h +@@ -91,6 +91,7 @@ struct dc_context { + bool created_bios; + struct gpio_service *gpio_service; + struct i2caux *i2caux; ++ unsigned int ref_clock_inKhz; + }; + + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +index a2a2ecf..1d6a9da 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +@@ -1230,17 +1230,12 @@ bool dce110_clk_src_construct( + goto unexpected_failure; + } + +- if (clk_src->ref_freq_khz == 48000) { +- calc_pll_cs_init_data_hdmi. +- min_override_input_pxl_clk_pll_freq_khz = 24000; +- calc_pll_cs_init_data_hdmi. +- max_override_input_pxl_clk_pll_freq_khz = 48000; +- } else if (clk_src->ref_freq_khz == 100000) { +- calc_pll_cs_init_data_hdmi. +- min_override_input_pxl_clk_pll_freq_khz = 25000; +- calc_pll_cs_init_data_hdmi. +- max_override_input_pxl_clk_pll_freq_khz = 50000; +- } ++ ++ calc_pll_cs_init_data_hdmi. ++ min_override_input_pxl_clk_pll_freq_khz = clk_src->ref_freq_khz/2; ++ calc_pll_cs_init_data_hdmi. ++ max_override_input_pxl_clk_pll_freq_khz = clk_src->ref_freq_khz; ++ + + if (!calc_pll_max_vco_construct( + &clk_src->calc_pll_hdmi, &calc_pll_cs_init_data_hdmi)) { +-- +2.7.4 + |