diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/0167-drm-amd-display-Don-t-reserve-pipe-for-underlay-on-A.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/0167-drm-amd-display-Don-t-reserve-pipe-for-underlay-on-A.patch | 95 |
1 files changed, 0 insertions, 95 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0167-drm-amd-display-Don-t-reserve-pipe-for-underlay-on-A.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0167-drm-amd-display-Don-t-reserve-pipe-for-underlay-on-A.patch deleted file mode 100644 index b7e21459..00000000 --- a/common/recipes-kernel/linux/linux-yocto-4.14.71/0167-drm-amd-display-Don-t-reserve-pipe-for-underlay-on-A.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 7c1dabd9dac278b47f50b649b34607dfdd90a95d Mon Sep 17 00:00:00 2001 -From: Harry Wentland <harry.wentland@amd.com> -Date: Mon, 23 Jan 2017 11:49:24 -0500 -Subject: [PATCH 0167/4131] drm/amd/display: Don't reserve pipe for underlay on - ASIC without underlay - -Signed-off-by: Harry Wentland <harry.wentland@amd.com> -Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> -Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +- - drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | 4 ++-- - drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c | 2 +- - drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c | 2 +- - drivers/gpu/drm/amd/display/dc/inc/core_types.h | 2 ++ - 5 files changed, 7 insertions(+), 5 deletions(-) - -diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c -index f9b7fc8..270f8c5 100644 ---- a/drivers/gpu/drm/amd/display/dc/core/dc.c -+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c -@@ -621,7 +621,7 @@ struct dc *dc_create(const struct dc_init_data *init_params) - core_dc->hwss.init_hw(core_dc); - - full_pipe_count = core_dc->res_pool->pipe_count; -- if (core_dc->res_pool->underlay_pipe_index >= 0) -+ if (core_dc->res_pool->underlay_pipe_index != NO_UNDERLAY_PIPE) - full_pipe_count--; - core_dc->public.caps.max_streams = min( - full_pipe_count, -diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c -index ae0e7ea..dc4f270 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c -@@ -934,7 +934,7 @@ static bool construct( - - pool->base.res_cap = &res_cap; - pool->base.funcs = &dce100_res_pool_funcs; -- pool->base.underlay_pipe_index = -1; -+ pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; - - bp = ctx->dc_bios; - -@@ -1004,7 +1004,7 @@ static bool construct( - /************************************************* - * Resource + asic cap harcoding * - *************************************************/ -- pool->base.underlay_pipe_index = -1; -+ pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; - pool->base.pipe_count = res_cap.num_timing_generator; - dc->public.caps.max_downscale_ratio = 200; - dc->public.caps.i2c_speed_in_khz = 40; -diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c -index 64fae91..fa8699d 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c -@@ -1243,7 +1243,7 @@ static bool construct( - /************************************************* - * Resource + asic cap harcoding * - *************************************************/ -- pool->base.underlay_pipe_index = -1; -+ pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; - pool->base.pipe_count = pool->base.res_cap->num_timing_generator; - dc->public.caps.max_downscale_ratio = 200; - dc->public.caps.i2c_speed_in_khz = 100; -diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c -index bee3a41..fea60aa 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c -@@ -931,7 +931,7 @@ static bool construct( - /************************************************* - * Resource + asic cap harcoding * - *************************************************/ -- pool->base.underlay_pipe_index = -1; -+ pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; - pool->base.pipe_count = res_cap.num_timing_generator; - dc->public.caps.max_downscale_ratio = 200; - dc->public.caps.i2c_speed_in_khz = 40; -diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h -index 66bfcdb..b349b57 100644 ---- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h -+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h -@@ -230,6 +230,8 @@ struct audio_support{ - bool hdmi_audio_native; - }; - -+#define NO_UNDERLAY_PIPE -1 -+ - struct resource_pool { - struct mem_input *mis[MAX_PIPES]; - struct input_pixel_processor *ipps[MAX_PIPES]; --- -2.7.4 - |