diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/0036-drm-amd-display-restyle-display-clock-calls-part-2.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/0036-drm-amd-display-restyle-display-clock-calls-part-2.patch | 335 |
1 files changed, 335 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0036-drm-amd-display-restyle-display-clock-calls-part-2.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0036-drm-amd-display-restyle-display-clock-calls-part-2.patch new file mode 100644 index 00000000..014549b8 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/0036-drm-amd-display-restyle-display-clock-calls-part-2.patch @@ -0,0 +1,335 @@ +From 3157522c1d7ec143548abc8e9e1b84be69f991d9 Mon Sep 17 00:00:00 2001 +From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Date: Wed, 30 Nov 2016 11:03:37 -0500 +Subject: [PATCH 0036/4131] drm/amd/display: restyle display clock calls part 2 + +Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <Harry.Wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc_link.c | 11 ++-- + .../drm/amd/display/dc/dce100/dce100_resource.c | 4 +- + .../amd/display/dc/dce110/dce110_hw_sequencer.c | 13 ++-- + .../drm/amd/display/dc/dce110/dce110_resource.c | 4 +- + .../drm/amd/display/dc/dce112/dce112_resource.c | 4 +- + .../gpu/drm/amd/display/dc/dce80/dce80_resource.c | 4 +- + drivers/gpu/drm/amd/display/dc/gpu/Makefile | 2 +- + .../display/dc/gpu/dce110/display_clock_dce110.h | 2 +- + .../display/dc/gpu/dce112/display_clock_dce112.h | 2 +- + .../amd/display/dc/gpu/dce80/display_clock_dce80.h | 2 +- + drivers/gpu/drm/amd/display/dc/gpu/display_clock.c | 75 ---------------------- + drivers/gpu/drm/amd/display/dc/gpu/display_clock.h | 31 --------- + .../amd/display/include/display_clock_interface.h | 11 ---- + 13 files changed, 30 insertions(+), 135 deletions(-) + delete mode 100644 drivers/gpu/drm/amd/display/dc/gpu/display_clock.c + delete mode 100644 drivers/gpu/drm/amd/display/dc/gpu/display_clock.h + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +index 70a2554..ab4efde 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +@@ -1223,12 +1223,13 @@ static enum dc_status enable_link_dp(struct pipe_ctx *pipe_ctx) + if (link_settings.link_rate == max_link_rate) { + cur_min_clock_state = CLOCKS_STATE_INVALID; + +- if (dal_display_clock_get_min_clocks_state( +- pipe_ctx->dis_clk, &cur_min_clock_state)) { ++ if (pipe_ctx->dis_clk->funcs->get_min_clocks_state) { ++ cur_min_clock_state = ++ pipe_ctx->dis_clk->funcs->get_min_clocks_state( ++ pipe_ctx->dis_clk); + if (cur_min_clock_state < CLOCKS_STATE_NOMINAL) +- dal_display_clock_set_min_clocks_state( +- pipe_ctx->dis_clk, +- CLOCKS_STATE_NOMINAL); ++ pipe_ctx->dis_clk->funcs->set_min_clocks_state( ++ pipe_ctx->dis_clk, CLOCKS_STATE_NOMINAL); + } else { + } + } +diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c +index 8f18a94..fa88eb1 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c +@@ -717,7 +717,9 @@ static void destruct(struct dce110_resource_pool *pool) + } + + if (pool->base.display_clock != NULL) +- dal_display_clock_destroy(&pool->base.display_clock); ++ pool->base.display_clock->funcs->destroy( ++ &pool->base.display_clock); ++ pool->base.display_clock = NULL; + + if (pool->base.irqs != NULL) + dal_irq_service_destroy(&pool->base.irqs); +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +index 16ee49d..ca71509 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +@@ -1099,9 +1099,11 @@ static void apply_min_clocks( + + if (!pre_mode_set) { + /* set clock_state without verification */ +- if (dal_display_clock_set_min_clocks_state( +- pipe_ctx->dis_clk, *clocks_state)) ++ if (pipe_ctx->dis_clk->funcs->set_min_clocks_state) { ++ pipe_ctx->dis_clk->funcs->set_min_clocks_state( ++ pipe_ctx->dis_clk, *clocks_state); + return; ++ } + + /* TODOFPGA */ + } +@@ -1114,9 +1116,10 @@ static void apply_min_clocks( + req_clocks.pixel_clk_khz = get_max_pixel_clock_for_all_paths( + dc, context, true); + +- if (dal_display_clock_get_required_clocks_state( +- pipe_ctx->dis_clk, &req_clocks, clocks_state)) { +- dal_display_clock_set_min_clocks_state( ++ if (pipe_ctx->dis_clk->funcs->get_required_clocks_state) { ++ *clocks_state = pipe_ctx->dis_clk->funcs->get_required_clocks_state( ++ pipe_ctx->dis_clk, &req_clocks); ++ pipe_ctx->dis_clk->funcs->set_min_clocks_state( + pipe_ctx->dis_clk, *clocks_state); + } else { + } +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +index a63112b..6c71339 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +@@ -700,7 +700,9 @@ static void destruct(struct dce110_resource_pool *pool) + } + + if (pool->base.display_clock != NULL) { +- dal_display_clock_destroy(&pool->base.display_clock); ++ pool->base.display_clock->funcs->destroy( ++ &pool->base.display_clock); ++ pool->base.display_clock = NULL; + } + + if (pool->base.irqs != NULL) { +diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c +index 7061601..8792c4e 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c +@@ -734,7 +734,9 @@ static void destruct(struct dce110_resource_pool *pool) + } + + if (pool->base.display_clock != NULL) { +- dal_display_clock_destroy(&pool->base.display_clock); ++ pool->base.display_clock->funcs->destroy( ++ &pool->base.display_clock); ++ pool->base.display_clock = NULL; + } + + if (pool->base.irqs != NULL) { +diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +index dfff2bf..1e829f8 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +@@ -657,7 +657,9 @@ static void destruct(struct dce110_resource_pool *pool) + } + + if (pool->base.display_clock != NULL) { +- dal_display_clock_destroy(&pool->base.display_clock); ++ pool->base.display_clock->funcs->destroy( ++ &pool->base.display_clock); ++ pool->base.display_clock = NULL; + } + + if (pool->base.irqs != NULL) { +diff --git a/drivers/gpu/drm/amd/display/dc/gpu/Makefile b/drivers/gpu/drm/amd/display/dc/gpu/Makefile +index fd17af1..0b99a74 100644 +--- a/drivers/gpu/drm/amd/display/dc/gpu/Makefile ++++ b/drivers/gpu/drm/amd/display/dc/gpu/Makefile +@@ -3,7 +3,7 @@ + # It provides the control and status of HW adapter resources, + # that are global for the ASIC and sharable between pipes. + +-GPU = display_clock.o divider_range.o ++GPU = divider_range.o + + AMD_DAL_GPU = $(addprefix $(AMDDALPATH)/dc/gpu/,$(GPU)) + +diff --git a/drivers/gpu/drm/amd/display/dc/gpu/dce110/display_clock_dce110.h b/drivers/gpu/drm/amd/display/dc/gpu/dce110/display_clock_dce110.h +index 88b4bdd..703cd65 100644 +--- a/drivers/gpu/drm/amd/display/dc/gpu/dce110/display_clock_dce110.h ++++ b/drivers/gpu/drm/amd/display/dc/gpu/dce110/display_clock_dce110.h +@@ -25,7 +25,7 @@ + #ifndef __DAL_DISPLAY_CLOCK_DCE110_H__ + #define __DAL_DISPLAY_CLOCK_DCE110_H__ + +-#include "gpu/display_clock.h" ++#include "display_clock_interface.h" + + struct display_clock_dce110 { + struct display_clock disp_clk_base; +diff --git a/drivers/gpu/drm/amd/display/dc/gpu/dce112/display_clock_dce112.h b/drivers/gpu/drm/amd/display/dc/gpu/dce112/display_clock_dce112.h +index 47a1497..34afff9 100644 +--- a/drivers/gpu/drm/amd/display/dc/gpu/dce112/display_clock_dce112.h ++++ b/drivers/gpu/drm/amd/display/dc/gpu/dce112/display_clock_dce112.h +@@ -25,7 +25,7 @@ + #ifndef __DAL_DISPLAY_CLOCK_DCE112_H__ + #define __DAL_DISPLAY_CLOCK_DCE112_H__ + +-#include "gpu/display_clock.h" ++#include "display_clock_interface.h" + + struct display_clock_dce112 { + struct display_clock disp_clk_base; +diff --git a/drivers/gpu/drm/amd/display/dc/gpu/dce80/display_clock_dce80.h b/drivers/gpu/drm/amd/display/dc/gpu/dce80/display_clock_dce80.h +index c675f1e..273a5d9 100644 +--- a/drivers/gpu/drm/amd/display/dc/gpu/dce80/display_clock_dce80.h ++++ b/drivers/gpu/drm/amd/display/dc/gpu/dce80/display_clock_dce80.h +@@ -25,7 +25,7 @@ + #ifndef __DAL_DISPLAY_CLOCK_DCE80_H__ + #define __DAL_DISPLAY_CLOCK_DCE80_H__ + +-#include "gpu/display_clock.h" ++#include "display_clock_interface.h" + + struct display_clock_dce80 { + struct display_clock disp_clk; +diff --git a/drivers/gpu/drm/amd/display/dc/gpu/display_clock.c b/drivers/gpu/drm/amd/display/dc/gpu/display_clock.c +deleted file mode 100644 +index c70c6b2..0000000 +--- a/drivers/gpu/drm/amd/display/dc/gpu/display_clock.c ++++ /dev/null +@@ -1,75 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#include "dm_services.h" +-#include "display_clock.h" +- +-void dal_display_clock_destroy(struct display_clock **disp_clk) +-{ +- if (!disp_clk || !*disp_clk) { +- BREAK_TO_DEBUGGER(); +- return; +- } +- +- (*disp_clk)->funcs->destroy(disp_clk); +- +- *disp_clk = NULL; +-} +- +-bool dal_display_clock_get_min_clocks_state( +- struct display_clock *disp_clk, +- enum clocks_state *clocks_state) +-{ +- if (!disp_clk->funcs->get_min_clocks_state) +- return false; +- +- *clocks_state = disp_clk->funcs->get_min_clocks_state(disp_clk); +- return true; +-} +- +-bool dal_display_clock_get_required_clocks_state( +- struct display_clock *disp_clk, +- struct state_dependent_clocks *req_clocks, +- enum clocks_state *clocks_state) +-{ +- if (!disp_clk->funcs->get_required_clocks_state) +- return false; +- +- *clocks_state = disp_clk->funcs->get_required_clocks_state( +- disp_clk, req_clocks); +- return true; +-} +- +-bool dal_display_clock_set_min_clocks_state( +- struct display_clock *disp_clk, +- enum clocks_state clocks_state) +-{ +- if (!disp_clk->funcs->set_min_clocks_state) +- return false; +- +- disp_clk->funcs->set_min_clocks_state(disp_clk, clocks_state); +- return true; +-} +- +diff --git a/drivers/gpu/drm/amd/display/dc/gpu/display_clock.h b/drivers/gpu/drm/amd/display/dc/gpu/display_clock.h +deleted file mode 100644 +index 68d2ab0..0000000 +--- a/drivers/gpu/drm/amd/display/dc/gpu/display_clock.h ++++ /dev/null +@@ -1,31 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_DISPLAY_CLOCK_H__ +-#define __DAL_DISPLAY_CLOCK_H__ +- +-#include "include/display_clock_interface.h" +- +-#endif /* __DAL_DISPLAY_CLOCK_H__*/ +diff --git a/drivers/gpu/drm/amd/display/include/display_clock_interface.h b/drivers/gpu/drm/amd/display/include/display_clock_interface.h +index f492537..a46ceeb 100644 +--- a/drivers/gpu/drm/amd/display/include/display_clock_interface.h ++++ b/drivers/gpu/drm/amd/display/include/display_clock_interface.h +@@ -93,15 +93,4 @@ struct display_clock *dal_display_clock_dce80_create( + + void dal_display_clock_destroy(struct display_clock **to_destroy); + +-bool dal_display_clock_get_min_clocks_state( +- struct display_clock *disp_clk, +- enum clocks_state *clocks_state); +-bool dal_display_clock_get_required_clocks_state( +- struct display_clock *disp_clk, +- struct state_dependent_clocks *req_clocks, +- enum clocks_state *clocks_state); +-bool dal_display_clock_set_min_clocks_state( +- struct display_clock *disp_clk, +- enum clocks_state clocks_state); +- + #endif /* __DISPLAY_CLOCK_INTERFACE_H__ */ +-- +2.7.4 + |