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-rw-r--r--common/recipes-kernel/linux/linux-amd/0042-drm-radeon-cik-enable-disable-vce-cg-when-encoding.patch90
1 files changed, 90 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-amd/0042-drm-radeon-cik-enable-disable-vce-cg-when-encoding.patch b/common/recipes-kernel/linux/linux-amd/0042-drm-radeon-cik-enable-disable-vce-cg-when-encoding.patch
new file mode 100644
index 00000000..52dfd301
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-amd/0042-drm-radeon-cik-enable-disable-vce-cg-when-encoding.patch
@@ -0,0 +1,90 @@
+From bfc95d64efcf9ec3590d17ccac0a064f906f8f2c Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 6 Sep 2013 12:33:04 -0400
+Subject: [PATCH 42/60] drm/radeon/cik: enable/disable vce cg when encoding
+
+Some of the vce clocks are automatic, others need to
+be manually enabled. For ease, just disable cg when
+vce is active.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/radeon/ci_dpm.c | 7 ++++++-
+ drivers/gpu/drm/radeon/cik.c | 5 +++++
+ drivers/gpu/drm/radeon/kv_dpm.c | 4 ++++
+ 3 files changed, 15 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
+index 4601fa8..de28f5b 100644
+--- a/drivers/gpu/drm/radeon/ci_dpm.c
++++ b/drivers/gpu/drm/radeon/ci_dpm.c
+@@ -3601,8 +3601,10 @@ static int ci_update_vce_dpm(struct radeon_device *rdev,
+
+ if (radeon_current_state->evclk != radeon_new_state->evclk) {
+ if (radeon_new_state->evclk) {
+- pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev);
++ /* turn the clocks on when encoding */
++ cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false);
+
++ pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev);
+ tmp = RREG32_SMC(DPM_TABLE_475);
+ tmp &= ~VceBootLevel_MASK;
+ tmp |= VceBootLevel(pi->smc_state_table.VceBootLevel);
+@@ -3610,6 +3612,9 @@ static int ci_update_vce_dpm(struct radeon_device *rdev,
+
+ ret = ci_enable_vce_dpm(rdev, true);
+ } else {
++ /* turn the clocks off when not encoding */
++ cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true);
++
+ ret = ci_enable_vce_dpm(rdev, false);
+ }
+ }
+diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
+index 9d2762d..e759595 100644
+--- a/drivers/gpu/drm/radeon/cik.c
++++ b/drivers/gpu/drm/radeon/cik.c
+@@ -72,6 +72,7 @@ extern void cik_sdma_vm_set_page(struct radeon_device *rdev,
+ uint64_t pe,
+ uint64_t addr, unsigned count,
+ uint32_t incr, uint32_t flags);
++extern void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable);
+ static void cik_rlc_stop(struct radeon_device *rdev);
+ static void cik_pcie_gen3_enable(struct radeon_device *rdev);
+ static void cik_program_aspm(struct radeon_device *rdev);
+@@ -5414,6 +5415,10 @@ void cik_update_cg(struct radeon_device *rdev,
+ cik_enable_hdp_mgcg(rdev, enable);
+ cik_enable_hdp_ls(rdev, enable);
+ }
++
++ if (block & RADEON_CG_BLOCK_VCE) {
++ vce_v2_0_enable_mgcg(rdev, enable);
++ }
+ }
+
+ static void cik_init_cg(struct radeon_device *rdev)
+diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c
+index c8b9d7b..a100b23 100644
+--- a/drivers/gpu/drm/radeon/kv_dpm.c
++++ b/drivers/gpu/drm/radeon/kv_dpm.c
+@@ -1420,6 +1420,8 @@ static int kv_update_vce_dpm(struct radeon_device *rdev,
+
+ if (radeon_new_state->evclk > 0 && radeon_current_state->evclk == 0) {
+ kv_dpm_powergate_vce(rdev, false);
++ /* turn the clocks on when encoding */
++ cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false);
+ if (pi->caps_stable_p_state)
+ pi->vce_boot_level = table->count - 1;
+ else
+@@ -1442,6 +1444,8 @@ static int kv_update_vce_dpm(struct radeon_device *rdev,
+ kv_enable_vce_dpm(rdev, true);
+ } else if (radeon_new_state->evclk == 0 && radeon_current_state->evclk > 0) {
+ kv_enable_vce_dpm(rdev, false);
++ /* turn the clocks off when not encoding */
++ cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true);
+ kv_dpm_powergate_vce(rdev, true);
+ }
+
+--
+1.9.1
+