diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/1078-drm-amd-cleanup-remaining-spaces-and-tabs-v2.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/1078-drm-amd-cleanup-remaining-spaces-and-tabs-v2.patch | 462 |
1 files changed, 0 insertions, 462 deletions
diff --git a/common/recipes-kernel/linux/files/1078-drm-amd-cleanup-remaining-spaces-and-tabs-v2.patch b/common/recipes-kernel/linux/files/1078-drm-amd-cleanup-remaining-spaces-and-tabs-v2.patch deleted file mode 100644 index bccd71a2..00000000 --- a/common/recipes-kernel/linux/files/1078-drm-amd-cleanup-remaining-spaces-and-tabs-v2.patch +++ /dev/null @@ -1,462 +0,0 @@ -From e60ad8ac6cce639f277ea57ec141f75f927c0d6e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Tue, 3 May 2016 15:54:54 +0200 -Subject: [PATCH 1078/1110] drm/amd: cleanup remaining spaces and tabs v2 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is the result of running the following commands: -find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \; -find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \; -find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \; -find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \; - -v2: drop changes to DAL and internal headers - -Signed-off-by: Christian König <christian.koenig@amd.com> -Reviewed-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | 6 +++--- - drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- - drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h | 6 +++--- - drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 +- - drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 6 +++--- - drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 6 +++--- - drivers/gpu/drm/amd/amdgpu/atom.h | 2 +- - drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 2 +- - drivers/gpu/drm/amd/amdgpu/cik_ih.c | 2 +- - drivers/gpu/drm/amd/amdgpu/cikd.h | 4 ++-- - drivers/gpu/drm/amd/amdgpu/cz_ih.c | 2 +- - drivers/gpu/drm/amd/amdgpu/cz_smumgr.h | 2 +- - drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +- - drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 6 +++--- - drivers/gpu/drm/amd/amdgpu/vid.h | 2 +- - drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 6 +++--- - drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 8 ++++---- - drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c | 4 ++-- - drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 8 ++++---- - drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h | 18 +++++++++--------- - drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 +- - drivers/gpu/drm/amd/scheduler/gpu_scheduler.h | 2 +- - 22 files changed, 50 insertions(+), 50 deletions(-) - -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c -index 17a2f83..d2b03e1 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c -@@ -264,7 +264,7 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, - for (i = 0; i < args->in.bo_number; ++i) { - if (copy_from_user(&info[i], uptr, bytes)) - goto error_free; -- -+ - uptr += args->in.bo_info_size; - } - } -@@ -272,7 +272,7 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, - switch (args->in.operation) { - case AMDGPU_BO_LIST_OP_CREATE: - r = amdgpu_bo_list_create(fpriv, &list, &handle); -- if (r) -+ if (r) - goto error_free; - - r = amdgpu_bo_list_set(adev, filp, list, info, -@@ -282,7 +282,7 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, - goto error_free; - - break; -- -+ - case AMDGPU_BO_LIST_OP_DESTROY: - amdgpu_bo_list_destroy(fpriv, handle); - handle = 0; -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -index 56e4627..4dbab46 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -@@ -348,7 +348,7 @@ static int amdgpu_doorbell_init(struct amdgpu_device *adev) - adev->doorbell.base = pci_resource_start(adev->pdev, 2); - adev->doorbell.size = pci_resource_len(adev->pdev, 2); - -- adev->doorbell.num_doorbells = min_t(u32, adev->doorbell.size / sizeof(u32), -+ adev->doorbell.num_doorbells = min_t(u32, adev->doorbell.size / sizeof(u32), - AMDGPU_DOORBELL_MAX_ASSIGNMENT+1); - if (adev->doorbell.num_doorbells == 0) - return -EINVAL; -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h -index c3f4e85..503d540 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h -@@ -43,7 +43,7 @@ struct amdgpu_ring; - struct amdgpu_bo; - - struct amdgpu_gds_asic_info { -- uint32_t total_size; -+ uint32_t total_size; - uint32_t gfx_partition_size; - uint32_t cs_partition_size; - }; -@@ -52,8 +52,8 @@ struct amdgpu_gds { - struct amdgpu_gds_asic_info mem; - struct amdgpu_gds_asic_info gws; - struct amdgpu_gds_asic_info oa; -- /* At present, GDS, GWS and OA resources for gfx (graphics) -- * is always pre-allocated and available for graphics operation. -+ /* At present, GDS, GWS and OA resources for gfx (graphics) -+ * is always pre-allocated and available for graphics operation. - * Such resource is shared between all gfx clients. - * TODO: move this operation to user space - * */ -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h -index 3d8c7c5..a8173b1 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h -@@ -585,7 +585,7 @@ struct amdgpu_mst_connector { - ((em) == ATOM_ENCODER_MODE_DP_MST)) - - /* Driver internal use only flags of amdgpu_get_crtc_scanoutpos() */ --#define USE_REAL_VBLANKSTART (1 << 30) -+#define USE_REAL_VBLANKSTART (1 << 30) - #define GET_DISTANCE_TO_VBLANKSTART (1 << 31) - - void amdgpu_link_encoder_connector(struct drm_device *dev); -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c -index 7c44f74..f58dd0a 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c -@@ -45,9 +45,9 @@ - /* Firmware Names */ - #ifdef CONFIG_DRM_AMDGPU_CIK - #define FIRMWARE_BONAIRE "radeon/bonaire_uvd.bin" --#define FIRMWARE_KABINI "radeon/kabini_uvd.bin" --#define FIRMWARE_KAVERI "radeon/kaveri_uvd.bin" --#define FIRMWARE_HAWAII "radeon/hawaii_uvd.bin" -+#define FIRMWARE_KABINI "radeon/kabini_uvd.bin" -+#define FIRMWARE_KAVERI "radeon/kaveri_uvd.bin" -+#define FIRMWARE_HAWAII "radeon/hawaii_uvd.bin" - #define FIRMWARE_MULLINS "radeon/mullins_uvd.bin" - #endif - #define FIRMWARE_TONGA "amdgpu/tonga_uvd.bin" -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c -index 97c3268..db7509c 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c -@@ -41,9 +41,9 @@ - /* Firmware Names */ - #ifdef CONFIG_DRM_AMDGPU_CIK - #define FIRMWARE_BONAIRE "radeon/bonaire_vce.bin" --#define FIRMWARE_KABINI "radeon/kabini_vce.bin" --#define FIRMWARE_KAVERI "radeon/kaveri_vce.bin" --#define FIRMWARE_HAWAII "radeon/hawaii_vce.bin" -+#define FIRMWARE_KABINI "radeon/kabini_vce.bin" -+#define FIRMWARE_KAVERI "radeon/kaveri_vce.bin" -+#define FIRMWARE_HAWAII "radeon/hawaii_vce.bin" - #define FIRMWARE_MULLINS "radeon/mullins_vce.bin" - #endif - #define FIRMWARE_TONGA "amdgpu/tonga_vce.bin" -diff --git a/drivers/gpu/drm/amd/amdgpu/atom.h b/drivers/gpu/drm/amd/amdgpu/atom.h -index fece8f4..49daf6d 100644 ---- a/drivers/gpu/drm/amd/amdgpu/atom.h -+++ b/drivers/gpu/drm/amd/amdgpu/atom.h -@@ -92,7 +92,7 @@ - #define ATOM_WS_AND_MASK 0x45 - #define ATOM_WS_FB_WINDOW 0x46 - #define ATOM_WS_ATTRIBUTES 0x47 --#define ATOM_WS_REGPTR 0x48 -+#define ATOM_WS_REGPTR 0x48 - - #define ATOM_IIO_NOP 0 - #define ATOM_IIO_START 1 -diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c -index 90f83b2..2f24797 100644 ---- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c -+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c -@@ -6363,7 +6363,7 @@ static int ci_dpm_set_interrupt_state(struct amdgpu_device *adev, - } - - static int ci_dpm_process_interrupt(struct amdgpu_device *adev, -- struct amdgpu_irq_src *source, -+ struct amdgpu_irq_src *source, - struct amdgpu_iv_entry *entry) - { - bool queue_thermal = false; -diff --git a/drivers/gpu/drm/amd/amdgpu/cik_ih.c b/drivers/gpu/drm/amd/amdgpu/cik_ih.c -index f2f14fe..7e750a4 100644 ---- a/drivers/gpu/drm/amd/amdgpu/cik_ih.c -+++ b/drivers/gpu/drm/amd/amdgpu/cik_ih.c -@@ -243,7 +243,7 @@ static void cik_ih_decode_iv(struct amdgpu_device *adev, - /* wptr/rptr are in bytes! */ - u32 ring_index = adev->irq.ih.rptr >> 2; - uint32_t dw[4]; -- -+ - dw[0] = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]); - dw[1] = le32_to_cpu(adev->irq.ih.ring[ring_index + 1]); - dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]); -diff --git a/drivers/gpu/drm/amd/amdgpu/cikd.h b/drivers/gpu/drm/amd/amdgpu/cikd.h -index 60d4493..c4f6f00 100644 ---- a/drivers/gpu/drm/amd/amdgpu/cikd.h -+++ b/drivers/gpu/drm/amd/amdgpu/cikd.h -@@ -190,8 +190,8 @@ - # define MACRO_TILE_ASPECT(x) ((x) << 4) - # define NUM_BANKS(x) ((x) << 6) - --#define MSG_ENTER_RLC_SAFE_MODE 1 --#define MSG_EXIT_RLC_SAFE_MODE 0 -+#define MSG_ENTER_RLC_SAFE_MODE 1 -+#define MSG_EXIT_RLC_SAFE_MODE 0 - - /* - * PM4 -diff --git a/drivers/gpu/drm/amd/amdgpu/cz_ih.c b/drivers/gpu/drm/amd/amdgpu/cz_ih.c -index 23bd912..874b928 100644 ---- a/drivers/gpu/drm/amd/amdgpu/cz_ih.c -+++ b/drivers/gpu/drm/amd/amdgpu/cz_ih.c -@@ -222,7 +222,7 @@ static void cz_ih_decode_iv(struct amdgpu_device *adev, - /* wptr/rptr are in bytes! */ - u32 ring_index = adev->irq.ih.rptr >> 2; - uint32_t dw[4]; -- -+ - dw[0] = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]); - dw[1] = le32_to_cpu(adev->irq.ih.ring[ring_index + 1]); - dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]); -diff --git a/drivers/gpu/drm/amd/amdgpu/cz_smumgr.h b/drivers/gpu/drm/amd/amdgpu/cz_smumgr.h -index 924d355..026342f 100644 ---- a/drivers/gpu/drm/amd/amdgpu/cz_smumgr.h -+++ b/drivers/gpu/drm/amd/amdgpu/cz_smumgr.h -@@ -77,7 +77,7 @@ struct cz_smu_private_data { - uint8_t driver_buffer_length; - uint8_t scratch_buffer_length; - uint16_t toc_entry_used_count; -- uint16_t toc_entry_initialize_index; -+ uint16_t toc_entry_initialize_index; - uint16_t toc_entry_power_profiling_index; - uint16_t toc_entry_aram; - uint16_t toc_entry_ih_register_restore_task_index; -diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c -index c2941ba..ba8d786 100644 ---- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c -@@ -603,7 +603,7 @@ static const u32 stoney_golden_settings_a11[] = - mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000, - mmRLC_CGCG_CGLS_CTRL, 0x00000003, 0x0001003c, - mmTA_CNTL_AUX, 0x000f000f, 0x000b0000, -- mmTCC_CTRL, 0x00100000, 0xf31fff7f, -+ mmTCC_CTRL, 0x00100000, 0xf31fff7f, - mmTCC_EXE_DISABLE, 0x00000002, 0x00000002, - mmTCP_ADDR_CONFIG, 0x0000000f, 0x000000f1, - mmTCP_CHAN_STEER_LO, 0xffffffff, 0x10101010, -diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c -index e1d6ae7..55b35da 100644 ---- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c -@@ -40,9 +40,9 @@ - - #define GRBM_GFX_INDEX__VCE_INSTANCE__SHIFT 0x04 - #define GRBM_GFX_INDEX__VCE_INSTANCE_MASK 0x10 --#define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 0x8616 --#define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 0x8617 --#define mmVCE_LMI_VCPU_CACHE_40BIT_BAR2 0x8618 -+#define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 0x8616 -+#define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 0x8617 -+#define mmVCE_LMI_VCPU_CACHE_40BIT_BAR2 0x8618 - - #define VCE_V3_0_FW_SIZE (384 * 1024) - #define VCE_V3_0_STACK_SIZE (64 * 1024) -diff --git a/drivers/gpu/drm/amd/amdgpu/vid.h b/drivers/gpu/drm/amd/amdgpu/vid.h -index ace4997..3bf7172 100644 ---- a/drivers/gpu/drm/amd/amdgpu/vid.h -+++ b/drivers/gpu/drm/amd/amdgpu/vid.h -@@ -365,7 +365,7 @@ - #define VCE_CMD_IB 0x00000002 - #define VCE_CMD_FENCE 0x00000003 - #define VCE_CMD_TRAP 0x00000004 --#define VCE_CMD_IB_AUTO 0x00000005 -+#define VCE_CMD_IB_AUTO 0x00000005 - #define VCE_CMD_SEMAPHORE 0x00000006 - - #endif -diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c -index 55e877c..d05a5e0 100644 ---- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c -+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c -@@ -465,14 +465,14 @@ static int fiji_set_private_data_based_on_pptable(struct pp_hwmgr *hwmgr) - table_info->vdd_dep_on_mclk; - - PP_ASSERT_WITH_CODE(allowed_sclk_vdd_table != NULL, -- "VDD dependency on SCLK table is missing. \ -+ "VDD dependency on SCLK table is missing. \ - This table is mandatory", return -EINVAL); - PP_ASSERT_WITH_CODE(allowed_sclk_vdd_table->count >= 1, -- "VDD dependency on SCLK table has to have is missing. \ -+ "VDD dependency on SCLK table has to have is missing. \ - This table is mandatory", return -EINVAL); - - PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table != NULL, -- "VDD dependency on MCLK table is missing. \ -+ "VDD dependency on MCLK table is missing. \ - This table is mandatory", return -EINVAL); - PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table->count >= 1, - "VDD dependency on MCLK table has to have is missing. \ -diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c -index 010199f..dbdcc68 100644 ---- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c -+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c -@@ -2900,14 +2900,14 @@ static int polaris10_set_private_data_based_on_pptable(struct pp_hwmgr *hwmgr) - table_info->vdd_dep_on_mclk; - - PP_ASSERT_WITH_CODE(allowed_sclk_vdd_table != NULL, -- "VDD dependency on SCLK table is missing. \ -+ "VDD dependency on SCLK table is missing. \ - This table is mandatory", return -EINVAL); - PP_ASSERT_WITH_CODE(allowed_sclk_vdd_table->count >= 1, -- "VDD dependency on SCLK table has to have is missing. \ -+ "VDD dependency on SCLK table has to have is missing. \ - This table is mandatory", return -EINVAL); - - PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table != NULL, -- "VDD dependency on MCLK table is missing. \ -+ "VDD dependency on MCLK table is missing. \ - This table is mandatory", return -EINVAL); - PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table->count >= 1, - "VDD dependency on MCLK table has to have is missing. \ -@@ -4628,7 +4628,7 @@ int polaris10_upload_mc_firmware(struct pp_hwmgr *hwmgr) - data->need_long_memory_training = true; - - /* -- * PPMCME_FirmwareDescriptorEntry *pfd = NULL; -+ * PPMCME_FirmwareDescriptorEntry *pfd = NULL; - pfd = &tonga_mcmeFirmware; - if (0 == PHM_READ_FIELD(hwmgr->device, MC_SEQ_SUP_CNTL, RUN)) - polaris10_load_mc_microcode(hwmgr, pfd->dpmThreshold, -diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c -index 8ba3ad5..da9f5f1 100644 ---- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c -+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c -@@ -1041,10 +1041,10 @@ int atomctrl_calculate_voltage_evv_on_sclk( - } - - /** atomctrl_get_voltage_evv_on_sclk gets voltage via call to ATOM COMMAND table. -- * @param hwmgr input: pointer to hwManager -+ * @param hwmgr input: pointer to hwManager - * @param voltage_type input: type of EVV voltage VDDC or VDDGFX - * @param sclk input: in 10Khz unit. DPM state SCLK frequency -- * which is define in PPTable SCLK/VDDC dependence -+ * which is define in PPTable SCLK/VDDC dependence - * table associated with this virtual_voltage_Id - * @param virtual_voltage_Id input: voltage id which match per voltage DPM state: 0xff01, 0xff02.. 0xff08 - * @param voltage output: real voltage level in unit of mv -diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c -index 670b628..d79af48 100644 ---- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c -+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c -@@ -2683,7 +2683,7 @@ static int tonga_populate_all_memory_levels(struct pp_hwmgr *hwmgr) - struct TONGA_DLL_SPEED_SETTING { - uint16_t Min; /* Minimum Data Rate*/ - uint16_t Max; /* Maximum Data Rate*/ -- uint32_t dll_speed; /* The desired DLL_SPEED setting*/ -+ uint32_t dll_speed; /* The desired DLL_SPEED setting*/ - }; - - static int tonga_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr) -@@ -3316,14 +3316,14 @@ static int tonga_set_private_var_based_on_pptale(struct pp_hwmgr *hwmgr) - pptable_info->vdd_dep_on_mclk; - - PP_ASSERT_WITH_CODE(allowed_sclk_vdd_table != NULL, -- "VDD dependency on SCLK table is missing. \ -+ "VDD dependency on SCLK table is missing. \ - This table is mandatory", return -1); - PP_ASSERT_WITH_CODE(allowed_sclk_vdd_table->count >= 1, -- "VDD dependency on SCLK table has to have is missing. \ -+ "VDD dependency on SCLK table has to have is missing. \ - This table is mandatory", return -1); - - PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table != NULL, -- "VDD dependency on MCLK table is missing. \ -+ "VDD dependency on MCLK table is missing. \ - This table is mandatory", return -1); - PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table->count >= 1, - "VDD dependency on MCLK table has to have is missing. \ -diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h -index c6a6b40..573cd39 100644 ---- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h -+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h -@@ -74,7 +74,7 @@ struct tonga_power_state { - }; - - struct _phw_tonga_dpm_level { -- bool enabled; -+ bool enabled; - uint32_t value; - uint32_t param1; - }; -@@ -237,20 +237,20 @@ struct tonga_hwmgr { - irq_handler_func_t ctf_callback; - void *ctf_context; - -- phw_tonga_clock_registers clock_registers; -+ phw_tonga_clock_registers clock_registers; - phw_tonga_voltage_smio_registers voltage_smio_registers; - -- bool is_memory_GDDR5; -+ bool is_memory_GDDR5; - uint16_t acpi_vddc; -- bool pspp_notify_required; /* Flag to indicate if PSPP notification to SBIOS is required */ -+ bool pspp_notify_required; /* Flag to indicate if PSPP notification to SBIOS is required */ - uint16_t force_pcie_gen; /* The forced PCI-E speed if not 0xffff */ - uint16_t acpi_pcie_gen; /* The PCI-E speed at ACPI time */ - uint32_t pcie_gen_cap; /* The PCI-E speed capabilities bitmap from CAIL */ - uint32_t pcie_lane_cap; /* The PCI-E lane capabilities bitmap from CAIL */ - uint32_t pcie_spc_cap; /* Symbol Per Clock Capabilities from registry */ -- phw_tonga_leakage_voltage vddc_leakage; /* The Leakage VDDC supported (based on leakage ID).*/ -- phw_tonga_leakage_voltage vddcgfx_leakage; /* The Leakage VDDC supported (based on leakage ID). */ -- phw_tonga_leakage_voltage vddci_leakage; /* The Leakage VDDCI supported (based on leakage ID). */ -+ phw_tonga_leakage_voltage vddc_leakage; /* The Leakage VDDC supported (based on leakage ID).*/ -+ phw_tonga_leakage_voltage vddcgfx_leakage; /* The Leakage VDDC supported (based on leakage ID). */ -+ phw_tonga_leakage_voltage vddci_leakage; /* The Leakage VDDCI supported (based on leakage ID). */ - - uint32_t mvdd_control; - uint32_t vddc_mask_low; -@@ -263,8 +263,8 @@ struct tonga_hwmgr { - uint32_t mclk_stutter_mode_threshold; - uint32_t mclk_edc_enable_threshold; - uint32_t mclk_edc_wr_enable_threshold; -- bool is_uvd_enabled; -- bool is_xdma_enabled; -+ bool is_uvd_enabled; -+ bool is_xdma_enabled; - phw_tonga_vbios_boot_state vbios_boot_state; - - bool battery_state; -diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h -index c96e5b1..fd4ce7a 100644 ---- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h -+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h -@@ -500,7 +500,7 @@ struct phm_dynamic_state_info { - struct phm_ppm_table *ppm_parameter_table; - struct phm_cac_tdp_table *cac_dtp_table; - struct phm_clock_voltage_dependency_table *vdd_gfx_dependency_on_sclk; -- struct phm_vq_budgeting_table *vq_budgeting_table; -+ struct phm_vq_budgeting_table *vq_budgeting_table; - }; - - struct pp_fan_info { -diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h -index 169f70f..070095a 100644 ---- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h -+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h -@@ -74,7 +74,7 @@ struct amd_sched_fence { - struct amd_gpu_scheduler *sched; - spinlock_t lock; - void *owner; -- struct amd_sched_job *s_job; -+ struct amd_sched_job *s_job; - }; - - struct amd_sched_job { --- -2.7.4 - |