diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0973-drm-amd-powerplay-fix-bug-dpm-can-t-work-when-resume.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0973-drm-amd-powerplay-fix-bug-dpm-can-t-work-when-resume.patch | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0973-drm-amd-powerplay-fix-bug-dpm-can-t-work-when-resume.patch b/common/recipes-kernel/linux/files/0973-drm-amd-powerplay-fix-bug-dpm-can-t-work-when-resume.patch new file mode 100644 index 00000000..6a2a15f3 --- /dev/null +++ b/common/recipes-kernel/linux/files/0973-drm-amd-powerplay-fix-bug-dpm-can-t-work-when-resume.patch @@ -0,0 +1,62 @@ +From 7611c95cb9ab9f180ee166cfc1124bc59f787ea1 Mon Sep 17 00:00:00 2001 +From: Eric Huang <JinHuiEric.Huang@amd.com> +Date: Mon, 4 Apr 2016 11:52:56 -0400 +Subject: [PATCH 0973/1110] drm/amd/powerplay: fix bug dpm can't work when + resume back on Polaris + +Fixes dpm on resume. + +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c +index c3e9aca..2ab3bb2 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c +@@ -1565,6 +1565,7 @@ static int polaris10_populate_smc_vce_level(struct pp_hwmgr *hwmgr, + + for (count = 0; count < table->VceLevelCount; count++) { + table->VceLevel[count].Frequency = mm_table->entries[count].eclk; ++ table->VceLevel[count].MinVoltage = 0; + table->VceLevel[count].MinVoltage |= + (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; + table->VceLevel[count].MinVoltage |= +@@ -1604,6 +1605,7 @@ static int polaris10_populate_smc_samu_level(struct pp_hwmgr *hwmgr, + + for (count = 0; count < table->SamuLevelCount; count++) { + /* not sure whether we need evclk or not */ ++ table->SamuLevel[count].MinVoltage = 0; + table->SamuLevel[count].Frequency = mm_table->entries[count].samclock; + table->SamuLevel[count].MinVoltage |= (mm_table->entries[count].vddc * + VOLTAGE_SCALE) << VDDC_SHIFT; +@@ -1696,6 +1698,7 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, + table->UvdBootLevel = 0; + + for (count = 0; count < table->UvdLevelCount; count++) { ++ table->UvdLevel[count].MinVoltage = 0; + table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; + table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; + table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * +@@ -2011,6 +2014,7 @@ static int polaris10_init_smc_table(struct pp_hwmgr *hwmgr) + if (POLARIS10_VOLTAGE_CONTROL_NONE != data->voltage_control) + polaris10_populate_smc_voltage_tables(hwmgr, table); + ++ table->SystemFlags = 0; + if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_AutomaticDCTransition)) + table->SystemFlags |= PPSMC_SYSTEMFLAG_GPIO_DC; +@@ -2104,6 +2108,7 @@ static int polaris10_init_smc_table(struct pp_hwmgr *hwmgr) + table->MemoryThermThrottleEnable = 1; + table->PCIeBootLinkLevel = 0; + table->PCIeGenInterval = 1; ++ table->VRConfig = 0; + + result = polaris10_populate_vr_config(hwmgr, table); + PP_ASSERT_WITH_CODE(0 == result, +-- +2.7.4 + |