diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0946-drm-amdgpu-apply-gfx_v8-fixes-to-gfx_v7-as-well.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0946-drm-amdgpu-apply-gfx_v8-fixes-to-gfx_v7-as-well.patch | 44 |
1 files changed, 0 insertions, 44 deletions
diff --git a/common/recipes-kernel/linux/files/0946-drm-amdgpu-apply-gfx_v8-fixes-to-gfx_v7-as-well.patch b/common/recipes-kernel/linux/files/0946-drm-amdgpu-apply-gfx_v8-fixes-to-gfx_v7-as-well.patch deleted file mode 100644 index 5487d614..00000000 --- a/common/recipes-kernel/linux/files/0946-drm-amdgpu-apply-gfx_v8-fixes-to-gfx_v7-as-well.patch +++ /dev/null @@ -1,44 +0,0 @@ -From d04ed3bbbfe4d0832bcbdd2fa7179a44568045f6 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Fri, 26 Feb 2016 16:18:15 +0100 -Subject: [PATCH 0946/1565] drm/amdgpu: apply gfx_v8 fixes to gfx_v7 as well -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -We never ported that back to CIK, so we could run into VM faults here. - -Signed-off-by: Christian König <christian.koenig@amd.com> -Reviewed-by: Alex Deucher <alexander.deucher@amd.com> -Cc: stable@vger.kernel.org ---- - drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c -index 7732059..06602df 100644 ---- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c -@@ -3628,6 +3628,19 @@ static void gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring, - unsigned vm_id, uint64_t pd_addr) - { - int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX); -+ uint32_t seq = ring->fence_drv.sync_seq; -+ uint64_t addr = ring->fence_drv.gpu_addr; -+ -+ amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); -+ amdgpu_ring_write(ring, (WAIT_REG_MEM_MEM_SPACE(1) | /* memory */ -+ WAIT_REG_MEM_FUNCTION(3) | /* equal */ -+ WAIT_REG_MEM_ENGINE(usepfp))); /* pfp or me */ -+ amdgpu_ring_write(ring, addr & 0xfffffffc); -+ amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); -+ amdgpu_ring_write(ring, seq); -+ amdgpu_ring_write(ring, 0xffffffff); -+ amdgpu_ring_write(ring, 4); /* poll interval */ -+ - if (usepfp) { - /* synce CE with ME to prevent CE fetch CEIB before context switch done */ - amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); --- -1.9.1 - |