diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0938-drm-amd-powerplay-add-GFX-SYS-clockgating-support-fo.patch')
-rw-r--r-- | common/recipes-kernel/linux/files/0938-drm-amd-powerplay-add-GFX-SYS-clockgating-support-fo.patch | 300 |
1 files changed, 300 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0938-drm-amd-powerplay-add-GFX-SYS-clockgating-support-fo.patch b/common/recipes-kernel/linux/files/0938-drm-amd-powerplay-add-GFX-SYS-clockgating-support-fo.patch new file mode 100644 index 00000000..9b5d14a5 --- /dev/null +++ b/common/recipes-kernel/linux/files/0938-drm-amd-powerplay-add-GFX-SYS-clockgating-support-fo.patch @@ -0,0 +1,300 @@ +From 1385ca339527a381716524984d21e6fe6c9cf280 Mon Sep 17 00:00:00 2001 +From: Eric Huang <JinHuiEric.Huang@amd.com> +Date: Thu, 11 Feb 2016 11:09:09 -0500 +Subject: [PATCH 0938/1110] drm/amd/powerplay: add GFX/SYS clockgating support + for ELM/BAF +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Acked-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> +--- + .../powerplay/hwmgr/ellesmere_clockpowergating.c | 247 +++++++++++++++++++++ + .../powerplay/hwmgr/ellesmere_clockpowergating.h | 2 + + .../gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c | 1 + + 3 files changed, 250 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c +index 0dee0df..a94f6a8 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c +@@ -151,3 +151,250 @@ int ellesmere_phm_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate) + return 0; + } + ++int ellesmere_phm_update_clock_gatings(struct pp_hwmgr *hwmgr, ++ const uint32_t *msg_id) ++{ ++ PPSMC_Msg msg; ++ uint32_t value; ++ ++ switch ((*msg_id & PP_GROUP_MASK) >> PP_GROUP_SHIFT) { ++ case PP_GROUP_GFX: ++ switch ((*msg_id & PP_BLOCK_MASK) >> PP_BLOCK_SHIFT) { ++ case PP_BLOCK_GFX_CG: ++ if (PP_STATE_SUPPORT_CG & *msg_id) { ++ msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_GFX_CGCG_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ if (PP_STATE_SUPPORT_LS & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ++ ? PPSMC_MSG_EnableClockGatingFeature ++ : PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_GFX_CGLS_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ case PP_BLOCK_GFX_3D: ++ if (PP_STATE_SUPPORT_CG & *msg_id) { ++ msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_GFX_3DCG_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ ++ if (PP_STATE_SUPPORT_LS & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_GFX_3DLS_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ case PP_BLOCK_GFX_RLC: ++ if (PP_STATE_SUPPORT_LS & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_GFX_RLC_LS_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ case PP_BLOCK_GFX_CP: ++ if (PP_STATE_SUPPORT_LS & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_GFX_CP_LS_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ case PP_BLOCK_GFX_MG: ++ if (PP_STATE_SUPPORT_CG & *msg_id) { ++ msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = (CG_CPF_MGCG_MASK | CG_RLC_MGCG_MASK | ++ CG_GFX_OTHERS_MGCG_MASK); ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ default: ++ return -1; ++ } ++ break; ++ ++ case PP_GROUP_SYS: ++ switch ((*msg_id & PP_BLOCK_MASK) >> PP_BLOCK_SHIFT) { ++ case PP_BLOCK_SYS_BIF: ++ if (PP_STATE_SUPPORT_CG & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_CG ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_BIF_MGCG_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ if (PP_STATE_SUPPORT_LS & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_BIF_MGLS_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ case PP_BLOCK_SYS_MC: ++ if (PP_STATE_SUPPORT_CG & *msg_id) { ++ msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_MC_MGCG_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ ++ if (PP_STATE_SUPPORT_LS & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_MC_MGLS_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ case PP_BLOCK_SYS_DRM: ++ if (PP_STATE_SUPPORT_CG & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_CG ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_DRM_MGCG_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ if (PP_STATE_SUPPORT_LS & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_DRM_MGLS_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ case PP_BLOCK_SYS_HDP: ++ if (PP_STATE_SUPPORT_CG & *msg_id) { ++ msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_HDP_MGCG_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ ++ if (PP_STATE_SUPPORT_LS & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_HDP_MGLS_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ case PP_BLOCK_SYS_SDMA: ++ if (PP_STATE_SUPPORT_CG & *msg_id) { ++ msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_SDMA_MGCG_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ ++ if (PP_STATE_SUPPORT_LS & *msg_id) { ++ msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_SDMA_MGLS_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ case PP_BLOCK_SYS_ROM: ++ if (PP_STATE_SUPPORT_CG & *msg_id) { ++ msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? ++ PPSMC_MSG_EnableClockGatingFeature : ++ PPSMC_MSG_DisableClockGatingFeature; ++ value = CG_SYS_ROM_MASK; ++ ++ if (smum_send_msg_to_smc_with_parameter( ++ hwmgr->smumgr, msg, value)) ++ return -1; ++ } ++ break; ++ ++ default: ++ return -1; ++ ++ } ++ break; ++ ++ default: ++ return -1; ++ ++ } ++ ++ return 0; ++} +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h +index 56a950e..a90577e 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h +@@ -33,5 +33,7 @@ int ellesmere_phm_powerdown_uvd(struct pp_hwmgr *hwmgr); + int ellesmere_phm_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate); + int ellesmere_phm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate); + int ellesmere_phm_disable_clock_power_gating(struct pp_hwmgr *hwmgr); ++int ellesmere_phm_update_clock_gatings(struct pp_hwmgr *hwmgr, ++ const uint32_t *msg_id); + + #endif /* _ELLESMERE_CLOCK_POWER_GATING_H_ */ +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c +index 043aefa..c87d5ef 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c +@@ -4670,6 +4670,7 @@ static const struct pp_hwmgr_func ellesmere_hwmgr_funcs = { + .powergate_uvd = ellesmere_phm_powergate_uvd, + .powergate_vce = ellesmere_phm_powergate_vce, + .disable_clock_power_gating = ellesmere_phm_disable_clock_power_gating, ++ .update_clock_gatings = ellesmere_phm_update_clock_gatings, + .notify_smc_display_config_after_ps_adjustment = ellesmere_notify_smc_display_config_after_ps_adjustment, + .display_config_changed = ellesmere_display_configuration_changed_task, + .set_max_fan_pwm_output = ellesmere_set_max_fan_pwm_output, +-- +2.7.4 + |