aboutsummaryrefslogtreecommitdiffstats
path: root/common/recipes-kernel/linux/files/0920-drm-amdgpu-add-DCE-golden-setting-for-ELM-BAF.patch
diff options
context:
space:
mode:
Diffstat (limited to 'common/recipes-kernel/linux/files/0920-drm-amdgpu-add-DCE-golden-setting-for-ELM-BAF.patch')
-rw-r--r--common/recipes-kernel/linux/files/0920-drm-amdgpu-add-DCE-golden-setting-for-ELM-BAF.patch59
1 files changed, 59 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0920-drm-amdgpu-add-DCE-golden-setting-for-ELM-BAF.patch b/common/recipes-kernel/linux/files/0920-drm-amdgpu-add-DCE-golden-setting-for-ELM-BAF.patch
new file mode 100644
index 00000000..dca2381d
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0920-drm-amdgpu-add-DCE-golden-setting-for-ELM-BAF.patch
@@ -0,0 +1,59 @@
+From 0ad46c7ea886c937db154f76c1ab3a5d1f3668a5 Mon Sep 17 00:00:00 2001
+From: Flora Cui <Flora.Cui@amd.com>
+Date: Thu, 29 Oct 2015 17:25:48 +0800
+Subject: [PATCH 0920/1110] drm/amdgpu: add DCE golden setting for ELM/BAF
+
+Signed-off-by: Flora Cui <Flora.Cui@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+index 78cd659..bcb8626 100644
+--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+@@ -132,6 +132,22 @@ static const u32 stoney_golden_settings_a11[] =
+ mmFBC_MISC, 0x1f311fff, 0x14302000,
+ };
+
++static const u32 baffin_golden_settings_a11[] =
++{
++ mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
++ mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
++ mmFBC_DEBUG1, 0xffffffff, 0x00000008,
++ mmFBC_MISC, 0x9f313fff, 0x14300008,
++ mmHDMI_CONTROL, 0x313f031f, 0x00000011,
++};
++
++static const u32 ellesmere_golden_settings_a11[] =
++{
++ mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
++ mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
++ mmFBC_MISC, 0x9f313fff, 0x14300008,
++ mmHDMI_CONTROL, 0x313f031f, 0x00000011,
++};
+
+ static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev)
+ {
+@@ -149,6 +165,16 @@ static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev)
+ stoney_golden_settings_a11,
+ (const u32)ARRAY_SIZE(stoney_golden_settings_a11));
+ break;
++ case CHIP_BAFFIN:
++ amdgpu_program_register_sequence(adev,
++ baffin_golden_settings_a11,
++ (const u32)ARRAY_SIZE(baffin_golden_settings_a11));
++ break;
++ case CHIP_ELLESMERE:
++ amdgpu_program_register_sequence(adev,
++ ellesmere_golden_settings_a11,
++ (const u32)ARRAY_SIZE(ellesmere_golden_settings_a11));
++ break;
+ default:
+ break;
+ }
+--
+2.7.4
+