diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0912-drm-amdgpu-atom-add-SetDCEClock-helper.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0912-drm-amdgpu-atom-add-SetDCEClock-helper.patch | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0912-drm-amdgpu-atom-add-SetDCEClock-helper.patch b/common/recipes-kernel/linux/files/0912-drm-amdgpu-atom-add-SetDCEClock-helper.patch new file mode 100644 index 00000000..563da0f6 --- /dev/null +++ b/common/recipes-kernel/linux/files/0912-drm-amdgpu-atom-add-SetDCEClock-helper.patch @@ -0,0 +1,98 @@ +From 54371792a70486399433d75c04cf30613f656898 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Thu, 15 Oct 2015 01:24:49 -0400 +Subject: [PATCH 0912/1110] drm/amdgpu/atom: add SetDCEClock helper +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +New cmd table for ELM/BAF for setting the dispclock or +dprefclock. + +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/atombios_crtc.c | 45 +++++++++++++++++++++++++++++- + drivers/gpu/drm/amd/amdgpu/atombios_crtc.h | 2 ++ + 2 files changed, 46 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c +index 49aa350..bd6c530 100644 +--- a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c ++++ b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c +@@ -467,7 +467,7 @@ union set_pixel_clock { + * required disp clk. + */ + void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, +- u32 dispclk) ++ u32 dispclk) + { + u8 frev, crev; + int index; +@@ -510,6 +510,49 @@ void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + } + ++union set_dce_clock { ++ SET_DCE_CLOCK_PS_ALLOCATION_V1_1 v1_1; ++ SET_DCE_CLOCK_PS_ALLOCATION_V2_1 v2_1; ++}; ++ ++u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev, ++ u32 freq, u8 clk_type, u8 clk_src) ++{ ++ u8 frev, crev; ++ int index; ++ union set_dce_clock args; ++ u32 ret_freq = 0; ++ ++ memset(&args, 0, sizeof(args)); ++ ++ index = GetIndexIntoMasterTable(COMMAND, SetDCEClock); ++ if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, ++ &crev)) ++ return 0; ++ ++ switch (frev) { ++ case 2: ++ switch (crev) { ++ case 1: ++ args.v2_1.asParam.ulDCEClkFreq = cpu_to_le32(freq); /* 10kHz units */ ++ args.v2_1.asParam.ucDCEClkType = clk_type; ++ args.v2_1.asParam.ucDCEClkSrc = clk_src; ++ amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); ++ ret_freq = le32_to_cpu(args.v2_1.asParam.ulDCEClkFreq) * 10; ++ break; ++ default: ++ DRM_ERROR("Unknown table version %d %d\n", frev, crev); ++ return 0; ++ } ++ break; ++ default: ++ DRM_ERROR("Unknown table version %d %d\n", frev, crev); ++ return 0; ++ } ++ ++ return ret_freq; ++} ++ + static bool is_pixel_clock_source_from_pll(u32 encoder_mode, int pll_id) + { + if (ENCODER_MODE_IS_DP(encoder_mode)) { +diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.h b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.h +index c670833..0eeda8e 100644 +--- a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.h ++++ b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.h +@@ -37,6 +37,8 @@ void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc, + struct drm_display_mode *mode); + void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, + u32 dispclk); ++u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev, ++ u32 freq, u8 clk_type, u8 clk_src); + void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, + u32 crtc_id, + int pll_id, +-- +2.7.4 + |