diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0905-drm-amd-dal-fix-warnings-with-msc-in-Xorg.patch')
-rw-r--r-- | common/recipes-kernel/linux/files/0905-drm-amd-dal-fix-warnings-with-msc-in-Xorg.patch | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0905-drm-amd-dal-fix-warnings-with-msc-in-Xorg.patch b/common/recipes-kernel/linux/files/0905-drm-amd-dal-fix-warnings-with-msc-in-Xorg.patch new file mode 100644 index 00000000..26892338 --- /dev/null +++ b/common/recipes-kernel/linux/files/0905-drm-amd-dal-fix-warnings-with-msc-in-Xorg.patch @@ -0,0 +1,49 @@ +From 5f602a6381c0a03a4f57cb9cfa3282cf163433e1 Mon Sep 17 00:00:00 2001 +From: Mykola Lysenko <Mykola.Lysenko@amd.com> +Date: Tue, 15 Mar 2016 05:52:55 -0400 +Subject: [PATCH 0905/1110] drm/amd/dal: fix warnings with msc in Xorg + +Mode 3 should be used in MASTER_UPDATE_MODE in +order to make V_UPDATE occur at the beginning of +the first line of vertical front porch. And so +flips are syncronized specific way required by +userspace + +Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c | 15 +++++++++++---- + 1 file changed, 11 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c +index 61dc9c0..de370ee 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c +@@ -268,12 +268,19 @@ bool dce110_timing_generator_enable_crtc(struct timing_generator *tg) + { + enum bp_result result; + +- /* 0 value is needed by DRR and is also suggested default value for CZ +- */ +- uint32_t value; + struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); ++ uint32_t value = 0; ++ ++ /* ++ * 3 is used to make sure V_UPDATE occurs at the beginning of the first ++ * line of vertical front porch ++ */ ++ set_reg_field_value( ++ value, ++ 3, ++ CRTC_MASTER_UPDATE_MODE, ++ MASTER_UPDATE_MODE); + +- value = 0; + dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value); + + /* TODO: may want this on to catch underflow */ +-- +2.7.4 + |