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-rw-r--r--common/recipes-kernel/linux/files/0881-drm-amd-dal-merge-same-map_clock_resources.patch325
1 files changed, 325 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0881-drm-amd-dal-merge-same-map_clock_resources.patch b/common/recipes-kernel/linux/files/0881-drm-amd-dal-merge-same-map_clock_resources.patch
new file mode 100644
index 00000000..f1c4e6a9
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0881-drm-amd-dal-merge-same-map_clock_resources.patch
@@ -0,0 +1,325 @@
+From 7d7df856a24ba94a4fb4b6c83dd410ac0f671f2d Mon Sep 17 00:00:00 2001
+From: Mykola Lysenko <Mykola.Lysenko@amd.com>
+Date: Mon, 7 Mar 2016 00:18:44 -0500
+Subject: [PATCH 0881/1110] drm/amd/dal: merge same map_clock_resources
+
+This is the follow-up change for clock sources clean-up
+
+Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com>
+Acked-by: Harry Wentland <harry.wentland@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/dal/dc/core/dc_resource.c | 55 +++++++++++++++++++
+ .../gpu/drm/amd/dal/dc/dce100/dce100_resource.c | 62 +---------------------
+ .../gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 56 +------------------
+ drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c | 55 +------------------
+ drivers/gpu/drm/amd/dal/dc/inc/resource.h | 4 ++
+ 5 files changed, 62 insertions(+), 170 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+index ba163c3..5f3b702 100644
+--- a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+@@ -1217,3 +1217,58 @@ void resource_build_info_frame(struct pipe_ctx *pipe_ctx)
+ translate_info_frame(&info_frame,
+ &pipe_ctx->encoder_info_frame);
+ }
++
++enum dc_status resource_map_clock_resources(
++ const struct core_dc *dc,
++ struct validate_context *context)
++{
++ uint8_t i, j, k;
++
++ /* acquire new resources */
++ for (i = 0; i < context->target_count; i++) {
++ struct core_target *target = context->targets[i];
++
++ if (context->target_flags[i].unchanged)
++ continue;
++
++ for (j = 0; j < target->public.stream_count; j++) {
++ struct core_stream *stream =
++ DC_STREAM_TO_CORE(target->public.streams[j]);
++
++ for (k = 0; k < MAX_PIPES; k++) {
++ struct pipe_ctx *pipe_ctx =
++ &context->res_ctx.pipe_ctx[k];
++
++ if (context->res_ctx.pipe_ctx[k].stream != stream)
++ continue;
++
++ if (dc_is_dp_signal(pipe_ctx->signal)
++ || pipe_ctx->signal == SIGNAL_TYPE_VIRTUAL)
++ pipe_ctx->clock_source =
++ context->res_ctx.pool.dp_clock_source;
++ else {
++ pipe_ctx->clock_source =
++ resource_find_used_clk_src_for_sharing(
++ &context->res_ctx,
++ pipe_ctx);
++
++ if (pipe_ctx->clock_source == NULL)
++ pipe_ctx->clock_source =
++ dc_resource_find_first_free_pll(&context->res_ctx);
++ }
++
++ if (pipe_ctx->clock_source == NULL)
++ return DC_NO_CLOCK_SOURCE_RESOURCE;
++
++ resource_reference_clock_source(
++ &context->res_ctx,
++ pipe_ctx->clock_source);
++
++ /* only one cs per stream regardless of mpo */
++ break;
++ }
++ }
++ }
++
++ return DC_OK;
++}
+diff --git a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c
+index f6b9cb8..6b8ae77 100644
+--- a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c
++++ b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c
+@@ -788,66 +788,6 @@ static void set_target_unchanged(
+ }
+ }
+
+-static enum dc_status map_clock_resources(
+- const struct core_dc *dc,
+- struct validate_context *context)
+-{
+- uint8_t i, j, k;
+-
+- /* acquire new resources */
+- for (i = 0; i < context->target_count; i++) {
+- struct core_target *target = context->targets[i];
+-
+- if (context->target_flags[i].unchanged)
+- continue;
+-
+- for (j = 0; j < target->public.stream_count; j++) {
+- struct core_stream *stream =
+- DC_STREAM_TO_CORE(target->public.streams[j]);
+-
+- for (k = 0; k < MAX_PIPES; k++) {
+- struct pipe_ctx *pipe_ctx =
+- &context->res_ctx.pipe_ctx[k];
+-
+- if (context->res_ctx.pipe_ctx[k].stream != stream)
+- continue;
+-
+- /*
+- * in this case if external clock source is not
+- * available for DP, it will pick-up first
+- * available pll from find_first_free_pll
+- */
+- if (dc_is_dp_signal(pipe_ctx->signal)
+- || pipe_ctx->signal == SIGNAL_TYPE_VIRTUAL)
+- pipe_ctx->clock_source =
+- context->res_ctx.pool.dp_clock_source;
+- else {
+- pipe_ctx->clock_source =
+- resource_find_used_clk_src_for_sharing(
+- &context->res_ctx,
+- pipe_ctx);
+-
+- if (pipe_ctx->clock_source == NULL)
+- pipe_ctx->clock_source =
+- dc_resource_find_first_free_pll(&context->res_ctx);
+- }
+-
+- if (pipe_ctx->clock_source == NULL)
+- return DC_NO_CLOCK_SOURCE_RESOURCE;
+-
+- resource_reference_clock_source(
+- &context->res_ctx,
+- pipe_ctx->clock_source);
+-
+- /* only one cs per stream regardless of mpo */
+- break;
+- }
+- }
+- }
+-
+- return DC_OK;
+-}
+-
+ enum dc_status dce100_validate_with_context(
+ const struct core_dc *dc,
+ const struct dc_validation_set set[],
+@@ -895,7 +835,7 @@ enum dc_status dce100_validate_with_context(
+ result = resource_map_pool_resources(dc, context);
+
+ if (result == DC_OK)
+- result = map_clock_resources(dc, context);
++ result = resource_map_clock_resources(dc, context);
+
+ if (result == DC_OK)
+ result = validate_mapped_resource(dc, context);
+diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
+index 66b7014..b39e2af 100644
+--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
+@@ -915,60 +915,6 @@ static void set_target_unchanged(
+ }
+ }
+
+-static enum dc_status map_clock_resources(
+- const struct core_dc *dc,
+- struct validate_context *context)
+-{
+- uint8_t i, j, k;
+-
+- /* acquire new resources */
+- for (i = 0; i < context->target_count; i++) {
+- struct core_target *target = context->targets[i];
+-
+- if (context->target_flags[i].unchanged)
+- continue;
+-
+- for (j = 0; j < target->public.stream_count; j++) {
+- struct core_stream *stream =
+- DC_STREAM_TO_CORE(target->public.streams[j]);
+-
+- for (k = 0; k < MAX_PIPES; k++) {
+- struct pipe_ctx *pipe_ctx =
+- &context->res_ctx.pipe_ctx[k];
+-
+- if (context->res_ctx.pipe_ctx[k].stream != stream)
+- continue;
+-
+- if (dc_is_dp_signal(pipe_ctx->signal)
+- || pipe_ctx->signal == SIGNAL_TYPE_VIRTUAL)
+- pipe_ctx->clock_source =
+- context->res_ctx.pool.dp_clock_source;
+- else {
+- pipe_ctx->clock_source =
+- resource_find_used_clk_src_for_sharing(
+- &context->res_ctx, pipe_ctx);
+-
+- if (pipe_ctx->clock_source == NULL)
+- pipe_ctx->clock_source =
+- dc_resource_find_first_free_pll(&context->res_ctx);
+- }
+-
+- if (pipe_ctx->clock_source == NULL)
+- return DC_NO_CLOCK_SOURCE_RESOURCE;
+-
+- resource_reference_clock_source(
+- &context->res_ctx,
+- pipe_ctx->clock_source);
+-
+- /* only one cs per stream regardless of mpo */
+- break;
+- }
+- }
+- }
+-
+- return DC_OK;
+-}
+-
+ enum dc_status dce110_validate_with_context(
+ const struct core_dc *dc,
+ const struct dc_validation_set set[],
+@@ -1016,7 +962,7 @@ enum dc_status dce110_validate_with_context(
+ result = resource_map_pool_resources(dc, context);
+
+ if (result == DC_OK)
+- result = map_clock_resources(dc, context);
++ result = resource_map_clock_resources(dc, context);
+
+ if (result == DC_OK)
+ result = validate_mapped_resource(dc, context);
+diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
+index 864f32a..3b70643 100644
+--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
++++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
+@@ -905,59 +905,6 @@ static void set_target_unchanged(
+ }
+ }
+
+-static enum dc_status map_clock_resources(
+- const struct core_dc *dc,
+- struct validate_context *context)
+-{
+- uint8_t i, j, k;
+-
+- /* acquire new resources */
+- for (i = 0; i < context->target_count; i++) {
+- struct core_target *target = context->targets[i];
+-
+- if (context->target_flags[i].unchanged)
+- continue;
+-
+- for (j = 0; j < target->public.stream_count; j++) {
+- struct core_stream *stream =
+- DC_STREAM_TO_CORE(target->public.streams[j]);
+-
+- for (k = 0; k < MAX_PIPES; k++) {
+- struct pipe_ctx *pipe_ctx =
+- &context->res_ctx.pipe_ctx[k];
+-
+- if (context->res_ctx.pipe_ctx[k].stream != stream)
+- continue;
+-
+- if (dc_is_dp_signal(pipe_ctx->signal)
+- || pipe_ctx->signal == SIGNAL_TYPE_VIRTUAL)
+- pipe_ctx->clock_source = context->res_ctx.pool.dp_clock_source;
+- else {
+- pipe_ctx->clock_source =
+- resource_find_used_clk_src_for_sharing(
+- &context->res_ctx, pipe_ctx);
+-
+- if (pipe_ctx->clock_source == NULL)
+- pipe_ctx->clock_source =
+- dc_resource_find_first_free_pll(&context->res_ctx);
+- }
+-
+- if (pipe_ctx->clock_source == NULL)
+- return DC_NO_CLOCK_SOURCE_RESOURCE;
+-
+- resource_reference_clock_source(
+- &context->res_ctx,
+- pipe_ctx->clock_source);
+-
+- /* only one cs per stream regardless of mpo */
+- break;
+- }
+- }
+- }
+-
+- return DC_OK;
+-}
+-
+ enum dc_status dce80_validate_with_context(
+ const struct core_dc *dc,
+ const struct dc_validation_set set[],
+@@ -1005,7 +952,7 @@ enum dc_status dce80_validate_with_context(
+ result = resource_map_pool_resources(dc, context);
+
+ if (result == DC_OK)
+- result = map_clock_resources(dc, context);
++ result = resource_map_clock_resources(dc, context);
+
+ if (result == DC_OK)
+ result = validate_mapped_resource(dc, context);
+diff --git a/drivers/gpu/drm/amd/dal/dc/inc/resource.h b/drivers/gpu/drm/amd/dal/dc/inc/resource.h
+index 45ee324..00843a4 100644
+--- a/drivers/gpu/drm/amd/dal/dc/inc/resource.h
++++ b/drivers/gpu/drm/amd/dal/dc/inc/resource.h
+@@ -88,5 +88,9 @@ void resource_validate_ctx_copy_construct(
+
+ void resource_validate_ctx_destruct(struct validate_context *context);
+
++enum dc_status resource_map_clock_resources(
++ const struct core_dc *dc,
++ struct validate_context *context);
++
+
+ #endif /* DRIVERS_GPU_DRM_AMD_DAL_DEV_DC_INC_RESOURCE_H_ */
+--
+2.7.4
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-26 23:31:37 +0000