diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0820-drm-amd-dal-Define-new-ipp-functions-for-diags.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0820-drm-amd-dal-Define-new-ipp-functions-for-diags.patch | 517 |
1 files changed, 517 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0820-drm-amd-dal-Define-new-ipp-functions-for-diags.patch b/common/recipes-kernel/linux/files/0820-drm-amd-dal-Define-new-ipp-functions-for-diags.patch new file mode 100644 index 00000000..543dc7bc --- /dev/null +++ b/common/recipes-kernel/linux/files/0820-drm-amd-dal-Define-new-ipp-functions-for-diags.patch @@ -0,0 +1,517 @@ +From 0db01598b1e4618521164542693767fdf92e4260 Mon Sep 17 00:00:00 2001 +From: Eric Yang <eric.yang2@amd.com> +Date: Fri, 19 Feb 2016 14:50:16 -0500 +Subject: [PATCH 0820/1110] drm/amd/dal: Define new ipp functions for diags + +Define new ipp functions for diags, created new file +hw_shared.h for types shared between different +virtual HW blocks. Minor clean up. + +Signed-off-by: Eric Yang <eric.yang2@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/dal/dc/calcs/gamma_calcs.c | 2 +- + .../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 4 +- + drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h | 2 +- + .../gpu/drm/amd/dal/dc/dce110/dce110_opp_regamma.c | 6 +- + .../drm/amd/dal/dc/dce110/dce110_opp_regamma_v.c | 6 +- + drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h | 2 +- + drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h | 2 +- + .../gpu/drm/amd/dal/dc/dce80/dce80_opp_regamma.c | 6 +- + drivers/gpu/drm/amd/dal/dc/inc/gamma_calcs.h | 2 +- + drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h | 74 ++++++++++++++++++++++ + drivers/gpu/drm/amd/dal/dc/inc/ipp.h | 41 +++++++++--- + drivers/gpu/drm/amd/dal/dc/inc/opp.h | 68 +++++++------------- + .../gpu/drm/amd/dal/include/hw_sequencer_types.h | 8 --- + drivers/gpu/drm/amd/dal/include/video_csc_types.h | 11 ---- + 14 files changed, 146 insertions(+), 88 deletions(-) + create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h + +diff --git a/drivers/gpu/drm/amd/dal/dc/calcs/gamma_calcs.c b/drivers/gpu/drm/amd/dal/dc/calcs/gamma_calcs.c +index e3a41b3..2fc1809 100644 +--- a/drivers/gpu/drm/amd/dal/dc/calcs/gamma_calcs.c ++++ b/drivers/gpu/drm/amd/dal/dc/calcs/gamma_calcs.c +@@ -1287,7 +1287,7 @@ static bool convert_to_custom_float( + return true; + } + +-void calculate_regamma_params(struct regamma_params *params, ++void calculate_regamma_params(struct pwl_params *params, + struct temp_params *temp_params, + const struct core_gamma *ramp, + const struct core_surface *surface) +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c +index 79ab334..76c2cad 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c +@@ -500,7 +500,7 @@ static bool set_gamma_ramp( + const struct core_surface *surface) + { + struct ipp_prescale_params *prescale_params; +- struct regamma_params *regamma_params; ++ struct pwl_params *regamma_params; + struct temp_params *temp_params; + bool result = false; + +@@ -511,7 +511,7 @@ static bool set_gamma_ramp( + goto prescale_alloc_fail; + + regamma_params = dm_alloc(opp->ctx, +- sizeof(struct regamma_params)); ++ sizeof(struct pwl_params)); + if (regamma_params == NULL) + goto regamma_alloc_fail; + +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h +index fada94d..cad4efa 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h +@@ -108,7 +108,7 @@ void dce110_opp_power_on_regamma_lut( + + bool dce110_opp_program_regamma_pwl( + struct output_pixel_processor *opp, +- const struct regamma_params *params); ++ const struct pwl_params *params); + + void dce110_opp_set_regamma_mode(struct output_pixel_processor *opp, + enum opp_regamma mode); +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_regamma.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_regamma.c +index 88803eb..e4f4fe0 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_regamma.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_regamma.c +@@ -62,7 +62,7 @@ enum { + */ + static void regamma_config_regions_and_segments( + struct dce110_opp *opp110, +- const struct regamma_params *params) ++ const struct pwl_params *params) + { + const struct gamma_curve *curve; + uint32_t value = 0; +@@ -385,7 +385,7 @@ static void regamma_config_regions_and_segments( + + static void program_pwl( + struct dce110_opp *opp110, +- const struct regamma_params *params) ++ const struct pwl_params *params) + { + uint32_t value; + +@@ -485,7 +485,7 @@ static void program_pwl( + + bool dce110_opp_program_regamma_pwl( + struct output_pixel_processor *opp, +- const struct regamma_params *params) ++ const struct pwl_params *params) + { + struct dce110_opp *opp110 = TO_DCE110_OPP(opp); + +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_regamma_v.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_regamma_v.c +index 8f4cb96..0004c9e 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_regamma_v.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_regamma_v.c +@@ -129,7 +129,7 @@ static void configure_regamma_mode(struct dce110_opp *opp110, uint32_t mode) + ***************************************************************************** + */ + static void regamma_config_regions_and_segments( +- struct dce110_opp *opp110, const struct regamma_params *params) ++ struct dce110_opp *opp110, const struct pwl_params *params) + { + const struct gamma_curve *curve; + uint32_t value = 0; +@@ -450,7 +450,7 @@ static void regamma_config_regions_and_segments( + } + + static void program_pwl(struct dce110_opp *opp110, +- const struct regamma_params *params) ++ const struct pwl_params *params) + { + uint32_t value = 0; + +@@ -493,7 +493,7 @@ static void program_pwl(struct dce110_opp *opp110, + + bool dce110_opp_program_regamma_pwl_v( + struct output_pixel_processor *opp, +- const struct regamma_params *params) ++ const struct pwl_params *params) + { + struct dce110_opp *opp110 = TO_DCE110_OPP(opp); + +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h +index d78395a..cb257fb 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h +@@ -47,7 +47,7 @@ void dce110_opp_v_set_csc_adjustment( + + bool dce110_opp_program_regamma_pwl_v( + struct output_pixel_processor *opp, +- const struct regamma_params *params); ++ const struct pwl_params *params); + + void dce110_opp_power_on_regamma_lut_v( + struct output_pixel_processor *opp, +diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h +index db5e0eb..725f18c 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h ++++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h +@@ -98,7 +98,7 @@ void dce80_opp_power_on_regamma_lut( + + bool dce80_opp_program_regamma_pwl( + struct output_pixel_processor *opp, +- const struct regamma_params *pamras); ++ const struct pwl_params *pamras); + + void dce80_opp_set_regamma_mode(struct output_pixel_processor *opp, + enum opp_regamma mode); +diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp_regamma.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp_regamma.c +index ef95e98..5b9663c 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp_regamma.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp_regamma.c +@@ -67,7 +67,7 @@ struct curve_config { + ***************************************************************************** + */ + static void regamma_config_regions_and_segments( +- struct dce80_opp *opp80, const struct regamma_params *params) ++ struct dce80_opp *opp80, const struct pwl_params *params) + { + const struct gamma_curve *curve; + uint32_t value = 0; +@@ -390,7 +390,7 @@ static void regamma_config_regions_and_segments( + + static void program_pwl( + struct dce80_opp *opp80, +- const struct regamma_params *params) ++ const struct pwl_params *params) + { + uint32_t value; + +@@ -517,7 +517,7 @@ void dce80_opp_power_on_regamma_lut( + + bool dce80_opp_program_regamma_pwl( + struct output_pixel_processor *opp, +- const struct regamma_params *params) ++ const struct pwl_params *params) + { + + struct dce80_opp *opp80 = TO_DCE80_OPP(opp); +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/gamma_calcs.h b/drivers/gpu/drm/amd/dal/dc/inc/gamma_calcs.h +index 4e35960..baab77a 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/gamma_calcs.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/gamma_calcs.h +@@ -23,7 +23,7 @@ struct temp_params { + + }; + +-void calculate_regamma_params(struct regamma_params *params, ++void calculate_regamma_params(struct pwl_params *params, + struct temp_params *temp_params, + const struct core_gamma *ramp, + const struct core_surface *surface); +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h b/drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h +new file mode 100644 +index 0000000..3b0e616 +--- /dev/null ++++ b/drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h +@@ -0,0 +1,74 @@ ++/* ++ * Copyright 2015 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: AMD ++ * ++ */ ++ ++#ifndef __DAL_HW_SHARED_H__ ++#define __DAL_HW_SHARED_H__ ++ ++/****************************************************************************** ++ * Data types shared between different Virtual HW blocks ++ ******************************************************************************/ ++struct gamma_curve { ++ uint32_t offset; ++ uint32_t segments_num; ++}; ++ ++struct curve_points { ++ struct fixed31_32 x; ++ struct fixed31_32 y; ++ struct fixed31_32 offset; ++ struct fixed31_32 slope; ++ ++ uint32_t custom_float_x; ++ uint32_t custom_float_y; ++ uint32_t custom_float_offset; ++ uint32_t custom_float_slope; ++}; ++ ++struct pwl_result_data { ++ struct fixed31_32 red; ++ struct fixed31_32 green; ++ struct fixed31_32 blue; ++ ++ struct fixed31_32 delta_red; ++ struct fixed31_32 delta_green; ++ struct fixed31_32 delta_blue; ++ ++ uint32_t red_reg; ++ uint32_t green_reg; ++ uint32_t blue_reg; ++ ++ uint32_t delta_red_reg; ++ uint32_t delta_green_reg; ++ uint32_t delta_blue_reg; ++}; ++ ++struct pwl_params { ++ uint32_t *data; ++ struct gamma_curve arr_curve_points[16]; ++ struct curve_points arr_points[3]; ++ struct pwl_result_data rgb_resulted[256 + 3]; ++ uint32_t hw_points_num; ++}; ++#endif /* __DAL_HW_SHARED_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/ipp.h b/drivers/gpu/drm/amd/dal/dc/inc/ipp.h +index 4599d68..9081820 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/ipp.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/ipp.h +@@ -27,11 +27,7 @@ + #ifndef __DAL_IPP_H__ + #define __DAL_IPP_H__ + +-#include "include/grph_object_id.h" +-#include "include/video_csc_types.h" +-#include "include/hw_sequencer_types.h" +- +-struct dev_c_lut; ++#include "hw_shared.h" + + #define MAXTRIX_COEFFICIENTS_NUMBER 12 + #define MAXTRIX_COEFFICIENTS_WRAP_NUMBER (MAXTRIX_COEFFICIENTS_NUMBER + 4) +@@ -78,9 +74,20 @@ struct dcp_video_matrix { + int32_t value[MAXTRIX_COEFFICIENTS_NUMBER]; + }; + ++enum expansion_mode { ++ EXPANSION_MODE_ZERO, ++ EXPANSION_MODE_DYNAMIC ++}; ++ ++enum ipp_output_format { ++ IPP_OUTPUT_FORMAT_12_BIT_FIX, ++ IPP_OUTPUT_FORMAT_16_BIT_BYPASS, ++ IPP_OUTPUT_FORMAT_FLOAT ++}; ++ + struct ipp_funcs { + +- /* CURSOR RELATED */ ++ /*** cursor ***/ + bool (*ipp_cursor_set_position)( + struct input_pixel_processor *ipp, + const struct dc_cursor_position *position); +@@ -89,14 +96,30 @@ struct ipp_funcs { + struct input_pixel_processor *ipp, + const struct dc_cursor_attributes *attributes); + +- /* DEGAMMA RELATED */ ++ /*** setup input pixel processing ***/ ++ ++ /* put the entire pixel processor to bypass */ ++ void (*ipp_full_bypass)(struct input_pixel_processor *ipp); ++ ++ /* setup ipp to expand/convert input to pixel processor internal format */ ++ void (*ipp_setup)( ++ enum surface_pixel_format input_format, ++ enum expansion_mode mode, ++ enum ipp_output_format output_format); ++ ++ /* DCE function to setup IPP. TODO: see if we can consolidate to setup */ ++ void (*ipp_program_prescale)( ++ struct input_pixel_processor *ipp, ++ struct ipp_prescale_params *params); ++ ++ /*** DEGAMMA RELATED ***/ + bool (*ipp_set_degamma)( + struct input_pixel_processor *ipp, + enum ipp_degamma_mode mode); + +- void (*ipp_program_prescale)( ++ bool (*ipp_program_degamma_pwl)( + struct input_pixel_processor *ipp, +- struct ipp_prescale_params *params); ++ const struct pwl_params *params); + + }; + +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/opp.h b/drivers/gpu/drm/amd/dal/dc/inc/opp.h +index 3d8fe0d..5335b0e 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/opp.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/opp.h +@@ -30,6 +30,7 @@ + #include "grph_object_id.h" + #include "video_csc_types.h" + #include "hw_sequencer_types.h" ++#include "hw_shared.h" + + struct fixed31_32; + struct gamma_parameters; +@@ -116,47 +117,12 @@ enum wide_gamut_regamma_mode { + WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_B + }; + +-struct pwl_result_data { +- struct fixed31_32 red; +- struct fixed31_32 green; +- struct fixed31_32 blue; +- +- struct fixed31_32 delta_red; +- struct fixed31_32 delta_green; +- struct fixed31_32 delta_blue; +- +- uint32_t red_reg; +- uint32_t green_reg; +- uint32_t blue_reg; +- +- uint32_t delta_red_reg; +- uint32_t delta_green_reg; +- uint32_t delta_blue_reg; +-}; +- + struct gamma_pixel { + struct fixed31_32 r; + struct fixed31_32 g; + struct fixed31_32 b; + }; + +-struct gamma_curve { +- uint32_t offset; +- uint32_t segments_num; +-}; +- +-struct curve_points { +- struct fixed31_32 x; +- struct fixed31_32 y; +- struct fixed31_32 offset; +- struct fixed31_32 slope; +- +- uint32_t custom_float_x; +- uint32_t custom_float_y; +- uint32_t custom_float_offset; +- uint32_t custom_float_slope; +-}; +- + enum channel_name { + CHANNEL_NAME_RED, + CHANNEL_NAME_GREEN, +@@ -260,14 +226,6 @@ enum fmt_stereo_action { + FMT_STEREO_ACTION_UPDATE_POLARITY + }; + +-struct regamma_params { +- uint32_t *data; +- struct gamma_curve arr_curve_points[16]; +- struct curve_points arr_points[3]; +- struct pwl_result_data rgb_resulted[256 + 3]; +- uint32_t hw_points_num; +-}; +- + enum graphics_csc_adjust_type { + GRAPHICS_CSC_ADJUST_TYPE_BYPASS = 0, + GRAPHICS_CSC_ADJUST_TYPE_HW, /* without adjustments */ +@@ -300,6 +258,28 @@ struct opp_grph_csc_adjustment { + int32_t grph_hue; + }; + ++ ++/* Underlay related types */ ++ ++struct hw_adjustment_range { ++ int32_t hw_default; ++ int32_t min; ++ int32_t max; ++ int32_t step; ++ uint32_t divider; /* (actually HW range is min/divider; divider !=0) */ ++}; ++ ++enum ovl_csc_adjust_item { ++ OVERLAY_BRIGHTNESS = 0, ++ OVERLAY_GAMMA, ++ OVERLAY_CONTRAST, ++ OVERLAY_SATURATION, ++ OVERLAY_HUE, ++ OVERLAY_ALPHA, ++ OVERLAY_ALPHA_PER_PIX, ++ OVERLAY_COLOR_TEMPERATURE ++}; ++ + struct opp_funcs { + void (*opp_power_on_regamma_lut)( + struct output_pixel_processor *opp, +@@ -307,7 +287,7 @@ struct opp_funcs { + + bool (*opp_program_regamma_pwl)( + struct output_pixel_processor *opp, +- const struct regamma_params *params); ++ const struct pwl_params *params); + + void (*opp_set_regamma_mode)(struct output_pixel_processor *opp, + enum opp_regamma mode); +diff --git a/drivers/gpu/drm/amd/dal/include/hw_sequencer_types.h b/drivers/gpu/drm/amd/dal/include/hw_sequencer_types.h +index ad7b906..9e32674 100644 +--- a/drivers/gpu/drm/amd/dal/include/hw_sequencer_types.h ++++ b/drivers/gpu/drm/amd/dal/include/hw_sequencer_types.h +@@ -293,12 +293,4 @@ enum channel_command_type { + #define TMDS_MAX_PIXEL_CLOCK_IN_KHZ 165000 + #define NATIVE_HDMI_MAX_PIXEL_CLOCK_IN_KHZ 297000 + +-struct hw_adjustment_range { +- int32_t hw_default; +- int32_t min; +- int32_t max; +- int32_t step; +- uint32_t divider; /* (actually HW range is min/divider; divider !=0) */ +-}; +- + #endif +diff --git a/drivers/gpu/drm/amd/dal/include/video_csc_types.h b/drivers/gpu/drm/amd/dal/include/video_csc_types.h +index 515f75b..d8526d3 100644 +--- a/drivers/gpu/drm/amd/dal/include/video_csc_types.h ++++ b/drivers/gpu/drm/amd/dal/include/video_csc_types.h +@@ -107,17 +107,6 @@ struct ovl_csc_adjustment { + + }; + +-enum ovl_csc_adjust_item { +- OVERLAY_BRIGHTNESS = 0, +- OVERLAY_GAMMA, +- OVERLAY_CONTRAST, +- OVERLAY_SATURATION, +- OVERLAY_HUE, +- OVERLAY_ALPHA, +- OVERLAY_ALPHA_PER_PIX, +- OVERLAY_COLOR_TEMPERATURE +-}; +- + struct input_csc_matrix { + enum color_space color_space; + uint16_t regval[12]; +-- +2.7.4 + |