diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0818-drm-amd-dal-delete-dead-code.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0818-drm-amd-dal-delete-dead-code.patch | 226 |
1 files changed, 226 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0818-drm-amd-dal-delete-dead-code.patch b/common/recipes-kernel/linux/files/0818-drm-amd-dal-delete-dead-code.patch new file mode 100644 index 00000000..fc0b7342 --- /dev/null +++ b/common/recipes-kernel/linux/files/0818-drm-amd-dal-delete-dead-code.patch @@ -0,0 +1,226 @@ +From c562cd14e7c34b0367e9749a007106020819ea07 Mon Sep 17 00:00:00 2001 +From: Eric Yang <eric.yang2@amd.com> +Date: Thu, 18 Feb 2016 12:37:30 -0500 +Subject: [PATCH 0818/1110] drm/amd/dal: delete dead code + +Signed-off-by: Eric Yang <eric.yang2@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/dal/dc/core/dc_resource.c | 36 +--------------------- + drivers/gpu/drm/amd/dal/dc/dc_hw_types.h | 27 ++-------------- + .../gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.c | 22 +++---------- + drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h | 1 - + .../gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c | 4 +-- + drivers/gpu/drm/amd/dal/dc/inc/ipp.h | 6 ---- + 6 files changed, 10 insertions(+), 86 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c +index e7a4b3e..107636a 100644 +--- a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c ++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c +@@ -192,39 +192,7 @@ static enum pixel_format convert_pixel_format_to_dalsurface( + case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb: + dal_pixel_format = PIXEL_FORMAT_420BPP12; + break; +- case SURFACE_PIXEL_FORMAT_VIDEO_422_YCb: +- dal_pixel_format = PIXEL_FORMAT_422BPP16; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_422_YCr: +- dal_pixel_format = PIXEL_FORMAT_422BPP16; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_422_CbY: +- dal_pixel_format = PIXEL_FORMAT_422BPP16; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_422_CrY: +- dal_pixel_format = PIXEL_FORMAT_422BPP16; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_444_ACrYCb1555: +- dal_pixel_format = PIXEL_FORMAT_444BPP16; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_444_CrYCb565: +- dal_pixel_format = PIXEL_FORMAT_444BPP16; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_444_ACrYCb4444: +- dal_pixel_format = PIXEL_FORMAT_444BPP16; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_444_CbYCrA5551: +- dal_pixel_format = PIXEL_FORMAT_444BPP16; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_444_ACrYCb8888: +- dal_pixel_format = PIXEL_FORMAT_444BPP32; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_444_ACrYCb2101010: +- dal_pixel_format = PIXEL_FORMAT_444BPP32; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_444_CbYCrA1010102: +- dal_pixel_format = PIXEL_FORMAT_444BPP32; +- break; ++ + default: + dal_pixel_format = PIXEL_FORMAT_UNKNOWN; + break; +@@ -335,8 +303,6 @@ static void calculate_scaling_ratios( + if (pipe_ctx->scl_data.format == PIXEL_FORMAT_420BPP12) { + pipe_ctx->scl_data.ratios.horz_c.value /= 2; + pipe_ctx->scl_data.ratios.vert_c.value /= 2; +- } else if (pipe_ctx->scl_data.format == PIXEL_FORMAT_422BPP16) { +- pipe_ctx->scl_data.ratios.horz_c.value /= 2; + } + } + +diff --git a/drivers/gpu/drm/amd/dal/dc/dc_hw_types.h b/drivers/gpu/drm/amd/dal/dc/dc_hw_types.h +index 61939f7..f11a78d 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dc_hw_types.h ++++ b/drivers/gpu/drm/amd/dal/dc/dc_hw_types.h +@@ -153,20 +153,8 @@ enum surface_pixel_format { + SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr = + SURFACE_PIXEL_FORMAT_VIDEO_BEGIN, + SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb, +- SURFACE_PIXEL_FORMAT_VIDEO_422_YCb, +- SURFACE_PIXEL_FORMAT_VIDEO_422_YCr, +- SURFACE_PIXEL_FORMAT_VIDEO_422_CbY, +- SURFACE_PIXEL_FORMAT_VIDEO_422_CrY, +- /*grow 422/420 video here if necessary */ +- SURFACE_PIXEL_FORMAT_VIDEO_444_BEGIN, +- SURFACE_PIXEL_FORMAT_VIDEO_444_ACrYCb1555 = +- SURFACE_PIXEL_FORMAT_VIDEO_444_BEGIN, +- SURFACE_PIXEL_FORMAT_VIDEO_444_CrYCb565, +- SURFACE_PIXEL_FORMAT_VIDEO_444_ACrYCb4444, +- SURFACE_PIXEL_FORMAT_VIDEO_444_CbYCrA5551, +- SURFACE_PIXEL_FORMAT_VIDEO_444_ACrYCb8888, +- SURFACE_PIXEL_FORMAT_VIDEO_444_ACrYCb2101010, +- SURFACE_PIXEL_FORMAT_VIDEO_444_CbYCrA1010102 ++ SURFACE_PIXEL_FORMAT_INVALID ++ + /*grow 444 video here if necessary */ + }; + +@@ -341,25 +329,16 @@ enum pixel_format { + PIXEL_FORMAT_FP16, + /*video*/ + PIXEL_FORMAT_420BPP12, +- PIXEL_FORMAT_422BPP16, +- PIXEL_FORMAT_444BPP16, +- PIXEL_FORMAT_444BPP32, + /*end of pixel format definition*/ + PIXEL_FORMAT_INVALID, + + PIXEL_FORMAT_GRPH_BEGIN = PIXEL_FORMAT_INDEX8, + PIXEL_FORMAT_GRPH_END = PIXEL_FORMAT_FP16, + PIXEL_FORMAT_VIDEO_BEGIN = PIXEL_FORMAT_420BPP12, +- PIXEL_FORMAT_VIDEO_END = PIXEL_FORMAT_444BPP32, ++ PIXEL_FORMAT_VIDEO_END = PIXEL_FORMAT_420BPP12, + PIXEL_FORMAT_UNKNOWN + }; + +-struct dev_c_lut { +- uint8_t red; +- uint8_t green; +- uint8_t blue; +-}; +- + /* OPP */ + enum dc_pixel_encoding { + PIXEL_ENCODING_UNDEFINED, +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.c +index 8a211d8..042bd3a 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.c +@@ -371,8 +371,7 @@ static void program_pixel_format( + struct dce110_mem_input *mem_input110, + enum surface_pixel_format format) + { +- if (format >= SURFACE_PIXEL_FORMAT_VIDEO_444_BEGIN || +- format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) { ++ if (format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) { + uint32_t value; + uint8_t grph_depth; + uint8_t grph_format; +@@ -459,19 +458,8 @@ static void program_pixel_format( + case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb: + video_format = 3; + break; +- case SURFACE_PIXEL_FORMAT_VIDEO_422_YCb: +- video_format = 4; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_422_YCr: +- video_format = 5; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_422_CbY: +- video_format = 6; +- break; +- case SURFACE_PIXEL_FORMAT_VIDEO_422_CrY: +- video_format = 7; +- break; + default: ++ video_format = 0; + break; + } + +@@ -482,9 +470,9 @@ static void program_pixel_format( + VIDEO_FORMAT); + + dm_write_reg( +- mem_input110->base.ctx, +- DCP_REG(mmUNP_GRPH_CONTROL_EXP), +- value); ++ mem_input110->base.ctx, ++ DCP_REG(mmUNP_GRPH_CONTROL_EXP), ++ value); + } + } + +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h +index e6dcaf8..fada94d 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h +@@ -68,7 +68,6 @@ struct dce110_regamma { + struct pwl_float_data *rgb_oem; + /* user supplied gamma */ + struct pwl_float_data *rgb_user; +- struct dev_c_lut saved_palette[RGB_256X3X16]; + uint32_t extra_points; + bool use_half_points; + struct fixed31_32 x_max1; +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c +index aef17b3..47ab396 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c +@@ -196,8 +196,7 @@ static bool setup_scaling_configuration( + set_reg_field_value(value, 1, SCLV_MODE, SCL_MODE_C); + set_reg_field_value(value, 1, SCLV_MODE, SCL_PSCL_EN_C); + is_scaling_needed = true; +- } else if (data->format != PIXEL_FORMAT_420BPP12 && +- data->format != PIXEL_FORMAT_422BPP16) { ++ } else if (data->format != PIXEL_FORMAT_420BPP12) { + set_reg_field_value( + value, + get_reg_field_value(value, SCLV_MODE, SCL_MODE), +@@ -356,7 +355,6 @@ static void calculate_inits( + inits->v_init_luma.integer = 1; + inits->h_init_chroma.integer = 1; + inits->v_init_chroma.integer = 1; +- + } + + static void program_scl_ratios_inits( +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/ipp.h b/drivers/gpu/drm/amd/dal/dc/inc/ipp.h +index e231ce1..bffeef5 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/ipp.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/ipp.h +@@ -111,12 +111,6 @@ struct ipp_funcs { + struct input_pixel_processor *ipp, + struct ipp_prescale_params *params); + +- bool (*ipp_set_palette)( +- struct input_pixel_processor *ipp, +- const struct dev_c_lut *palette, +- uint32_t start, +- uint32_t length, +- enum pixel_format surface_pixel_format); + }; + + #endif /* __DAL_IPP_H__ */ +-- +2.7.4 + |