diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0801-drm-amdgpu-export-some-dce-functions-to-share-with-D.patch')
-rw-r--r-- | common/recipes-kernel/linux/files/0801-drm-amdgpu-export-some-dce-functions-to-share-with-D.patch | 187 |
1 files changed, 0 insertions, 187 deletions
diff --git a/common/recipes-kernel/linux/files/0801-drm-amdgpu-export-some-dce-functions-to-share-with-D.patch b/common/recipes-kernel/linux/files/0801-drm-amdgpu-export-some-dce-functions-to-share-with-D.patch deleted file mode 100644 index 384fed9c..00000000 --- a/common/recipes-kernel/linux/files/0801-drm-amdgpu-export-some-dce-functions-to-share-with-D.patch +++ /dev/null @@ -1,187 +0,0 @@ -From b02a75a3e0fab415d09bbd38d4f04754f392d805 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Thu, 18 Feb 2016 16:01:27 -0500 -Subject: [PATCH 0801/1110] drm/amdgpu: export some dce functions to share with - DAL (v2) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Share some common DCE 8/10/11 functions with DAL. - -v2: drop extern - -Reviewed-by: Harry Wentland <harry.wentland@amd.com> -Reviewed-by: Christian König <christian.koenig@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 12 ++++++------ - drivers/gpu/drm/amd/amdgpu/dce_v10_0.h | 7 +++++++ - drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 12 ++++++------ - drivers/gpu/drm/amd/amdgpu/dce_v11_0.h | 7 +++++++ - drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 12 ++++++------ - drivers/gpu/drm/amd/amdgpu/dce_v8_0.h | 7 +++++++ - 6 files changed, 39 insertions(+), 18 deletions(-) - -diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c -index 80261bc..2445c01 100644 ---- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c -@@ -556,8 +556,8 @@ static bool dce_v10_0_is_display_hung(struct amdgpu_device *adev) - return true; - } - --static void dce_v10_0_stop_mc_access(struct amdgpu_device *adev, -- struct amdgpu_mode_mc_save *save) -+void dce_v10_0_stop_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save) - { - u32 crtc_enabled, tmp; - int i; -@@ -621,8 +621,8 @@ static void dce_v10_0_stop_mc_access(struct amdgpu_device *adev, - } - } - --static void dce_v10_0_resume_mc_access(struct amdgpu_device *adev, -- struct amdgpu_mode_mc_save *save) -+void dce_v10_0_resume_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save) - { - u32 tmp, frame_count; - int i, j; -@@ -684,8 +684,8 @@ static void dce_v10_0_resume_mc_access(struct amdgpu_device *adev, - WREG32(mmVGA_RENDER_CONTROL, save->vga_render_control); - } - --static void dce_v10_0_set_vga_render_state(struct amdgpu_device *adev, -- bool render) -+void dce_v10_0_set_vga_render_state(struct amdgpu_device *adev, -+ bool render) - { - u32 tmp; - -diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.h b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.h -index 1bfa48d..3947956 100644 ---- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.h -+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.h -@@ -26,4 +26,11 @@ - - extern const struct amd_ip_funcs dce_v10_0_ip_funcs; - -+void dce_v10_0_set_vga_render_state(struct amdgpu_device *adev, -+ bool render); -+void dce_v10_0_stop_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save); -+void dce_v10_0_resume_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save); -+ - #endif -diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c -index fd74bce..8a616a7 100644 ---- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c -@@ -546,8 +546,8 @@ static bool dce_v11_0_is_display_hung(struct amdgpu_device *adev) - return true; - } - --static void dce_v11_0_stop_mc_access(struct amdgpu_device *adev, -- struct amdgpu_mode_mc_save *save) -+void dce_v11_0_stop_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save) - { - u32 crtc_enabled, tmp; - int i; -@@ -590,8 +590,8 @@ static void dce_v11_0_stop_mc_access(struct amdgpu_device *adev, - } - } - --static void dce_v11_0_resume_mc_access(struct amdgpu_device *adev, -- struct amdgpu_mode_mc_save *save) -+void dce_v11_0_resume_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save) - { - u32 tmp; - int i; -@@ -619,8 +619,8 @@ static void dce_v11_0_resume_mc_access(struct amdgpu_device *adev, - WREG32(mmVGA_RENDER_CONTROL, save->vga_render_control); - } - --static void dce_v11_0_set_vga_render_state(struct amdgpu_device *adev, -- bool render) -+void dce_v11_0_set_vga_render_state(struct amdgpu_device *adev, -+ bool render) - { - u32 tmp; - -diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.h b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.h -index 84e4618..dc6ff04 100644 ---- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.h -+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.h -@@ -26,4 +26,11 @@ - - extern const struct amd_ip_funcs dce_v11_0_ip_funcs; - -+void dce_v11_0_set_vga_render_state(struct amdgpu_device *adev, -+ bool render); -+void dce_v11_0_stop_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save); -+void dce_v11_0_resume_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save); -+ - #endif -diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c -index b351e76..a42148f 100644 ---- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c -@@ -504,8 +504,8 @@ static bool dce_v8_0_is_display_hung(struct amdgpu_device *adev) - return true; - } - --static void dce_v8_0_stop_mc_access(struct amdgpu_device *adev, -- struct amdgpu_mode_mc_save *save) -+void dce_v8_0_stop_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save) - { - u32 crtc_enabled, tmp; - int i; -@@ -569,8 +569,8 @@ static void dce_v8_0_stop_mc_access(struct amdgpu_device *adev, - } - } - --static void dce_v8_0_resume_mc_access(struct amdgpu_device *adev, -- struct amdgpu_mode_mc_save *save) -+void dce_v8_0_resume_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save) - { - u32 tmp, frame_count; - int i, j; -@@ -632,8 +632,8 @@ static void dce_v8_0_resume_mc_access(struct amdgpu_device *adev, - WREG32(mmVGA_RENDER_CONTROL, save->vga_render_control); - } - --static void dce_v8_0_set_vga_render_state(struct amdgpu_device *adev, -- bool render) -+void dce_v8_0_set_vga_render_state(struct amdgpu_device *adev, -+ bool render) - { - u32 tmp; - -diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.h b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.h -index 7701685..4bb72ab 100644 ---- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.h -+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.h -@@ -26,4 +26,11 @@ - - extern const struct amd_ip_funcs dce_v8_0_ip_funcs; - -+void dce_v8_0_set_vga_render_state(struct amdgpu_device *adev, -+ bool render); -+void dce_v8_0_stop_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save); -+void dce_v8_0_resume_mc_access(struct amdgpu_device *adev, -+ struct amdgpu_mode_mc_save *save); -+ - #endif --- -2.7.4 - |