diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0785-drm-amd-dal-Use-reg-offset-to-handle-blndv-programmi.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0785-drm-amd-dal-Use-reg-offset-to-handle-blndv-programmi.patch | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0785-drm-amd-dal-Use-reg-offset-to-handle-blndv-programmi.patch b/common/recipes-kernel/linux/files/0785-drm-amd-dal-Use-reg-offset-to-handle-blndv-programmi.patch new file mode 100644 index 00000000..7e442e4e --- /dev/null +++ b/common/recipes-kernel/linux/files/0785-drm-amd-dal-Use-reg-offset-to-handle-blndv-programmi.patch @@ -0,0 +1,94 @@ +From 4f990cdc9179309c2e03d6a978a179b791c284fb Mon Sep 17 00:00:00 2001 +From: Eric Yang <eric.yang2@amd.com> +Date: Tue, 9 Feb 2016 16:03:42 -0500 +Subject: [PATCH 0785/1110] drm/amd/dal: Use reg offset to handle blndv + programming + +Using offsets to handle blndv programming, leaving the +code path generic + +Signed-off-by: Eric Yang <eric.yang2@amd.com> +Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> +--- + .../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 48 ++++++++-------------- + 1 file changed, 17 insertions(+), 31 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c +index 946e42f..43840c1 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c +@@ -84,6 +84,11 @@ static const struct dce110_hw_seq_reg_offsets reg_offsets[] = { + .dcfe = (mmDCFE2_DCFE_MEM_PWR_CTRL - mmDCFE_MEM_PWR_CTRL), + .blnd = (mmBLND2_BLND_CONTROL - mmBLND_CONTROL), + .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), ++}, ++{ ++ .dcfe = (mmDCFEV_MEM_PWR_CTRL - mmDCFE_MEM_PWR_CTRL), ++ .blnd = (mmBLNDV_CONTROL - mmBLND_CONTROL), ++ .crtc = (mmCRTCV_GSL_CONTROL - mmCRTC_GSL_CONTROL), + } + }; + +@@ -352,7 +357,7 @@ static void dce110_set_blender_mode( + uint32_t mode) + { + uint32_t value; +- uint32_t addr = 0; ++ uint32_t addr = HW_REG_BLND(mmBLND_CONTROL, controller_id); + uint32_t blnd_mode; + uint32_t feedthrough = 0; + +@@ -372,39 +377,20 @@ static void dce110_set_blender_mode( + break; + } + +- if (controller_id == CONTROLLER_ID_UNDERLAY0) { +- addr = mmBLNDV_CONTROL; +- value = dm_read_reg(ctx, addr); +- +- set_reg_field_value( +- value, +- feedthrough, +- BLNDV_CONTROL, +- BLND_FEEDTHROUGH_EN); +- +- set_reg_field_value( +- value, +- blnd_mode, +- BLNDV_CONTROL, +- BLND_MODE); +- ++ value = dm_read_reg(ctx, addr); + +- } else { +- addr = HW_REG_BLND(mmBLND_CONTROL, controller_id); +- value = dm_read_reg(ctx, addr); ++ set_reg_field_value( ++ value, ++ feedthrough, ++ BLND_CONTROL, ++ BLND_FEEDTHROUGH_EN); + +- set_reg_field_value( +- value, +- feedthrough, +- BLND_CONTROL, +- BLND_FEEDTHROUGH_EN); ++ set_reg_field_value( ++ value, ++ blnd_mode, ++ BLND_CONTROL, ++ BLND_MODE); + +- set_reg_field_value( +- value, +- blnd_mode, +- BLND_CONTROL, +- BLND_MODE); +- } + + dm_write_reg(ctx, addr, value); + } +-- +2.7.4 + |