aboutsummaryrefslogtreecommitdiffstats
path: root/common/recipes-kernel/linux/files/0782-drm-amd-dal-Temporary-disable-PLL-sharing-for-DCE-10.patch
diff options
context:
space:
mode:
Diffstat (limited to 'common/recipes-kernel/linux/files/0782-drm-amd-dal-Temporary-disable-PLL-sharing-for-DCE-10.patch')
-rw-r--r--common/recipes-kernel/linux/files/0782-drm-amd-dal-Temporary-disable-PLL-sharing-for-DCE-10.patch47
1 files changed, 47 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0782-drm-amd-dal-Temporary-disable-PLL-sharing-for-DCE-10.patch b/common/recipes-kernel/linux/files/0782-drm-amd-dal-Temporary-disable-PLL-sharing-for-DCE-10.patch
new file mode 100644
index 00000000..e140467a
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0782-drm-amd-dal-Temporary-disable-PLL-sharing-for-DCE-10.patch
@@ -0,0 +1,47 @@
+From 0a4fa31afa57a5ed03f3574771e941ba63d30c79 Mon Sep 17 00:00:00 2001
+From: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
+Date: Tue, 9 Feb 2016 11:58:59 -0500
+Subject: [PATCH 0782/1110] drm/amd/dal: Temporary disable PLL sharing for DCE
+ 10.
+
+Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
+Acked-by: Jordan Lazare <Jordan.Lazare@amd.com>
+---
+ drivers/gpu/drm/amd/dal/dc/core/dc_resource.c | 14 ++++++++++----
+ 1 file changed, 10 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+index eea4eec..ec6db8d 100644
+--- a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+@@ -103,6 +103,16 @@ static bool is_sharable_clk_src(
+ const struct core_stream *stream)
+ {
+ enum clock_source_id id = stream_with_clk_src->clock_source->id;
++#if defined(CONFIG_DRM_AMD_DAL_DCE10_0)
++ enum dce_version dce_ver = dal_adapter_service_get_dce_version(
++ stream->sink->link->adapter_srv);
++
++ /* Currently no clocks are shared for DCE 10 until VBIOS behaviour
++ * is verified for this use case
++ */
++ if (dce_ver == DCE_VERSION_10_0)
++ return false;
++#endif
+
+ if (stream_with_clk_src->clock_source == NULL)
+ return false;
+@@ -110,10 +120,6 @@ static bool is_sharable_clk_src(
+ if (id == CLOCK_SOURCE_ID_EXTERNAL)
+ return false;
+
+- /* Sharing dual link is not working */
+- if (stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK ||
+- stream_with_clk_src->signal == SIGNAL_TYPE_DVI_DUAL_LINK)
+- return false;
+
+ if(!is_same_timing(
+ &stream_with_clk_src->public.timing, &stream->public.timing))
+--
+2.7.4
+