diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0719-drm-amd-dal-update-core-link-mst-stream-allocation-t.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0719-drm-amd-dal-update-core-link-mst-stream-allocation-t.patch | 499 |
1 files changed, 499 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0719-drm-amd-dal-update-core-link-mst-stream-allocation-t.patch b/common/recipes-kernel/linux/files/0719-drm-amd-dal-update-core-link-mst-stream-allocation-t.patch new file mode 100644 index 00000000..841aadb1 --- /dev/null +++ b/common/recipes-kernel/linux/files/0719-drm-amd-dal-update-core-link-mst-stream-allocation-t.patch @@ -0,0 +1,499 @@ +From c02f297bf62cbfe4cda8955332780e5ebb0c3e90 Mon Sep 17 00:00:00 2001 +From: Hersen Wu <hersenxs.wu@amd.com> +Date: Mon, 11 Jan 2016 16:53:07 -0500 +Subject: [PATCH 0719/1110] drm/amd/dal: update core link mst stream allocation + table with stream encoder + +Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + .../gpu/drm/amd/dal/amdgpu_dm/amdgpu_dc_helpers.c | 43 +------- + drivers/gpu/drm/amd/dal/dc/core/dc_link.c | 122 +++++++++++++-------- + drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c | 2 +- + drivers/gpu/drm/amd/dal/dc/dc_helpers.h | 1 - + .../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 5 +- + .../drm/amd/dal/dc/dce110/dce110_link_encoder.c | 12 +- + .../drm/amd/dal/dc/dce110/dce110_link_encoder.h | 2 +- + drivers/gpu/drm/amd/dal/dc/inc/core_types.h | 26 ++++- + drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h | 2 +- + .../drm/amd/dal/dc/virtual/virtual_link_encoder.c | 2 +- + .../gpu/drm/amd/dal/include/link_service_types.h | 8 +- + 11 files changed, 113 insertions(+), 112 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dc_helpers.c b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dc_helpers.c +index 855f9f9..ab426e3 100644 +--- a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dc_helpers.c ++++ b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dc_helpers.c +@@ -160,27 +160,8 @@ static struct amdgpu_connector *get_connector_for_link( + return aconnector; + } + +-const struct dp_mst_stream_allocation *find_stream_with_matching_vcpi( +- const struct dp_mst_stream_allocation_table *table, +- uint32_t vcpi) +-{ +- int i; +- +- for (i = 0; i < table->stream_count; i++) { +- const struct dp_mst_stream_allocation *sa = +- &table->stream_allocations[i]; +- if (sa->vcp_id == vcpi) +- return sa; +- } +- return NULL; +-} +- +- + static void get_payload_table( +- struct drm_device *dev, + struct amdgpu_connector *aconnector, +- const struct dc_stream *stream, +- const struct dp_mst_stream_allocation_table *cur_table, + struct dp_mst_stream_allocation_table *proposed_table) + { + int i; +@@ -203,26 +184,13 @@ static void get_payload_table( + mst_mgr->payloads[i].payload_state == + DP_PAYLOAD_REMOTE) { + +- const struct dp_mst_stream_allocation *sa_src +- = find_stream_with_matching_vcpi( +- cur_table, +- mst_mgr->proposed_vcpis[i]->vcpi); +- +- if (sa_src) { +- proposed_table->stream_allocations[ +- proposed_table->stream_count] = *sa_src; +- proposed_table->stream_count++; +- } else { +- struct dp_mst_stream_allocation *sa = ++ struct dp_mst_stream_allocation *sa = + &proposed_table->stream_allocations[ + proposed_table->stream_count]; + +- sa->slot_count = +- mst_mgr->payloads[i].num_slots; +- sa->stream = stream; +- sa->vcp_id = mst_mgr->proposed_vcpis[i]->vcpi; +- proposed_table->stream_count++; +- } ++ sa->slot_count = mst_mgr->payloads[i].num_slots; ++ sa->vcp_id = mst_mgr->proposed_vcpis[i]->vcpi; ++ proposed_table->stream_count++; + } + } + +@@ -235,7 +203,6 @@ static void get_payload_table( + bool dc_helpers_dp_mst_write_payload_allocation_table( + struct dc_context *ctx, + const struct dc_stream *stream, +- const struct dp_mst_stream_allocation_table *cur_table, + struct dp_mst_stream_allocation_table *proposed_table, + bool enable) + { +@@ -312,7 +279,7 @@ bool dc_helpers_dp_mst_write_payload_allocation_table( + * stream. AMD ASIC stream slot allocation should follow the same + * sequence. copy DRM MST allocation to dc */ + +- get_payload_table(dev, aconnector, stream, cur_table, proposed_table); ++ get_payload_table(aconnector, proposed_table); + + if (ret) + return false; +diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c +index 912f3fe..caba06e 100644 +--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c ++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c +@@ -1390,6 +1390,58 @@ static struct fixed31_32 get_pbn_from_timing(struct core_stream *stream) + return peak_kbps; + } + ++static void update_mst_stream_alloc_table( ++ struct core_link *link, ++ struct core_stream *stream, ++ const struct dp_mst_stream_allocation_table *proposed_table) ++{ ++ struct link_mst_stream_allocation work_table[MAX_CONTROLLER_NUM] = { ++ { 0 } }; ++ struct link_mst_stream_allocation *dc_alloc; ++ ++ int i; ++ int j; ++ ++ /* if DRM proposed_table has more than one new payload */ ++ ASSERT(proposed_table->stream_count - ++ link->mst_stream_alloc_table.stream_count < 2); ++ ++ /* copy proposed_table to core_link, add stream encoder */ ++ for (i = 0; i < proposed_table->stream_count; i++) { ++ ++ for (j = 0; j < link->mst_stream_alloc_table.stream_count; j++) { ++ dc_alloc = ++ &link->mst_stream_alloc_table.stream_allocations[j]; ++ ++ if (dc_alloc->vcp_id == ++ proposed_table->stream_allocations[i].vcp_id) { ++ ++ work_table[i] = *dc_alloc; ++ break; /* exit j loop */ ++ } ++ } ++ ++ /* new vcp_id */ ++ if (j == link->mst_stream_alloc_table.stream_count) { ++ work_table[i].vcp_id = ++ proposed_table->stream_allocations[i].vcp_id; ++ work_table[i].slot_count = ++ proposed_table->stream_allocations[i].slot_count; ++ work_table[i].stream_enc = stream->stream_enc; ++ } ++ } ++ ++ /* update link->mst_stream_alloc_table with work_table */ ++ link->mst_stream_alloc_table.stream_count = ++ proposed_table->stream_count; ++ for (i = 0; i < MAX_CONTROLLER_NUM; i++) ++ link->mst_stream_alloc_table.stream_allocations[i] = ++ work_table[i]; ++} ++ ++/* convert link_mst_stream_alloc_table to dm dp_mst_stream_alloc_table ++ * because stream_encoder is not exposed to dm ++ */ + static enum dc_status allocate_mst_payload(struct core_stream *stream) + { + struct core_link *link = stream->sink->link; +@@ -1411,31 +1463,32 @@ static enum dc_status allocate_mst_payload(struct core_stream *stream) + dc_helpers_dp_mst_write_payload_allocation_table( + stream->ctx, + &stream->public, +- &link->stream_alloc_table, + &proposed_table, + true); + ++ update_mst_stream_alloc_table(link, stream, &proposed_table); ++ + dal_logger_write(link->ctx->logger, + LOG_MAJOR_MST, + LOG_MINOR_MST_PROGRAMMING, + "%s " + "stream_count: %d: \n ", + __func__, +- proposed_table.stream_count); ++ link->mst_stream_alloc_table.stream_count); + + for (i = 0; i < MAX_CONTROLLER_NUM; i++) { + dal_logger_write(link->ctx->logger, + LOG_MAJOR_MST, + LOG_MINOR_MST_PROGRAMMING, +- "stream[%d]: 0x%x " ++ "stream_enc[%d]: 0x%x " + "stream[%d].vcp_id: %d " + "stream[%d].slot_count: %d\n", + i, +- proposed_table.stream_allocations[i].stream, ++ link->mst_stream_alloc_table.stream_allocations[i].stream_enc, + i, +- proposed_table.stream_allocations[i].vcp_id, ++ link->mst_stream_alloc_table.stream_allocations[i].vcp_id, + i, +- proposed_table.stream_allocations[i].slot_count); ++ link->mst_stream_alloc_table.stream_allocations[i].slot_count); + } + + ASSERT(proposed_table.stream_count > 0); +@@ -1453,9 +1506,7 @@ static enum dc_status allocate_mst_payload(struct core_stream *stream) + /* program DP source TX for payload */ + link_encoder->funcs->update_mst_stream_allocation_table( + link_encoder, +- &proposed_table); +- +- link->stream_alloc_table = proposed_table; ++ &link->mst_stream_alloc_table); + + /* send down message */ + dc_helpers_dp_mst_poll_for_allocation_change_trigger( +@@ -1509,9 +1560,15 @@ static enum dc_status deallocate_mst_payload(struct core_stream *stream) + dc_helpers_dp_mst_write_payload_allocation_table( + stream->ctx, + &stream->public, +- &link->stream_alloc_table, + &proposed_table, + false); ++ dc_helpers_dp_mst_write_payload_allocation_table( ++ stream->ctx, ++ &stream->public, ++ &proposed_table, ++ false); ++ ++ update_mst_stream_alloc_table(link, stream, &proposed_table); + + dal_logger_write(link->ctx->logger, + LOG_MAJOR_MST, +@@ -1519,28 +1576,26 @@ static enum dc_status deallocate_mst_payload(struct core_stream *stream) + "%s" + "stream_count: %d: ", + __func__, +- proposed_table.stream_count); ++ link->mst_stream_alloc_table.stream_count); + + for (i = 0; i < MAX_CONTROLLER_NUM; i++) { + dal_logger_write(link->ctx->logger, + LOG_MAJOR_MST, + LOG_MINOR_MST_PROGRAMMING, +- "stream[%d]: 0x%x" +- "stream[%d].vcp_id: %d" +- "stream[%d].slot_count: %d", ++ "stream_enc[%d]: 0x%x " ++ "stream[%d].vcp_id: %d " ++ "stream[%d].slot_count: %d\n", + i, +- proposed_table.stream_allocations[i].stream, ++ link->mst_stream_alloc_table.stream_allocations[i].stream_enc, + i, +- proposed_table.stream_allocations[i].vcp_id, ++ link->mst_stream_alloc_table.stream_allocations[i].vcp_id, + i, +- proposed_table.stream_allocations[i].slot_count); ++ link->mst_stream_alloc_table.stream_allocations[i].slot_count); + } + + link_encoder->funcs->update_mst_stream_allocation_table( + link_encoder, +- &proposed_table); +- +- link->stream_alloc_table = proposed_table; ++ &link->mst_stream_alloc_table); + + if (mst_mode) { + dc_helpers_dp_mst_poll_for_allocation_change_trigger( +@@ -1589,31 +1644,4 @@ void core_link_disable_stream( + + } + +-void core_link_update_stream( +- struct core_link *link, +- struct core_stream *stream) +-{ +- if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) { +- uint32_t i; + +- for (i = 0; i < link->stream_alloc_table.stream_count; i++) { +- const struct core_stream *s; +- +- s = DC_STREAM_TO_CORE( +- link->stream_alloc_table. +- stream_allocations[i].stream); +- +- if (stream->stream_enc == s->stream_enc) { +- link->stream_alloc_table.stream_allocations[i].stream = +- &stream->public; +- +- dal_logger_write(link->ctx->logger, +- LOG_MAJOR_MST, +- LOG_MINOR_MST_PROGRAMMING, +- "%s ", +- __func__); +- break; +- } +- } +- } +-} +diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c +index 8f1b869..2ed9eb8 100644 +--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c ++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c +@@ -96,7 +96,7 @@ void dp_disable_link_phy(struct core_link *link, enum signal_type signal) + void dp_disable_link_phy_mst(struct core_link *link, struct core_stream *stream) + { + /* MST disable link only when no stream use the link */ +- if (link->stream_alloc_table.stream_count > 0) ++ if (link->mst_stream_alloc_table.stream_count > 0) + return; + + dp_disable_link_phy(link, stream->signal); +diff --git a/drivers/gpu/drm/amd/dal/dc/dc_helpers.h b/drivers/gpu/drm/amd/dal/dc/dc_helpers.h +index bd082d8..6bb1160 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dc_helpers.h ++++ b/drivers/gpu/drm/amd/dal/dc/dc_helpers.h +@@ -46,7 +46,6 @@ enum dc_edid_status dc_helpers_parse_edid_caps( + bool dc_helpers_dp_mst_write_payload_allocation_table( + struct dc_context *ctx, + const struct dc_stream *stream, +- const struct dp_mst_stream_allocation_table *cur_table, + struct dp_mst_stream_allocation_table *proposed_table, + bool enable); + +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c +index 44ad5a2..74d437e 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c +@@ -898,11 +898,8 @@ static enum dc_status apply_single_controller_ctx_to_hw(uint8_t controller_idx, + context->res_ctx.pool.timing_generators[controller_idx], + color_space); + +- if (timing_changed) { ++ if (timing_changed) + core_link_enable_stream(stream->sink->link, stream); +- } else { +- core_link_update_stream(stream->sink->link, stream); +- } + + if (dc_is_dp_signal(stream->signal)) + unblank_stream(stream, &stream->sink->link->cur_link_settings); +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c +index 780c3a6..4a83e25 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c +@@ -1592,16 +1592,14 @@ void dce110_link_encoder_dp_set_phy_pattern( + } + + static void fill_stream_allocation_row_info( +- const struct dp_mst_stream_allocation *stream_allocation, ++ const struct link_mst_stream_allocation *stream_allocation, + uint32_t *src, + uint32_t *slots) + { +- const struct dc_stream *dc_stream = stream_allocation->stream; +- struct core_stream *core_stream; ++ const struct stream_encoder *stream_enc = stream_allocation->stream_enc; + +- if (dc_stream) { +- core_stream = DC_STREAM_TO_CORE(dc_stream); +- *src = core_stream->stream_enc->id; ++ if (stream_enc) { ++ *src = stream_enc->id; + *slots = stream_allocation->slot_count; + } else { + *src = 0; +@@ -1612,7 +1610,7 @@ static void fill_stream_allocation_row_info( + /* programs DP MST VC payload allocation */ + void dce110_link_encoder_update_mst_stream_allocation_table( + struct link_encoder *enc, +- const struct dp_mst_stream_allocation_table *table) ++ const struct link_mst_stream_allocation_table *table) + { + struct dce110_link_encoder *enc110 = TO_DCE110_LINK_ENC(enc); + struct dc_context *ctx = enc110->base.ctx; +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h +index 31a33a8..46e2971 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h +@@ -133,7 +133,7 @@ void dce110_link_encoder_dp_set_phy_pattern( + /* programs DP MST VC payload allocation */ + void dce110_link_encoder_update_mst_stream_allocation_table( + struct link_encoder *enc, +- const struct dp_mst_stream_allocation_table *table); ++ const struct link_mst_stream_allocation_table *table); + + void dce110_link_encoder_set_lcd_backlight_level( + struct link_encoder *enc, +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/core_types.h b/drivers/gpu/drm/amd/dal/dc/inc/core_types.h +index f31ee42..1597b33 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/core_types.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/core_types.h +@@ -196,6 +196,25 @@ union dp_wa { + uint32_t raw; + }; + ++/* DP MST stream allocation (payload bandwidth number) */ ++struct link_mst_stream_allocation { ++ /* DIG front */ ++ const struct stream_encoder *stream_enc; ++ /* associate DRM payload table with DC stream encoder */ ++ uint8_t vcp_id; ++ /* number of slots required for the DP stream in transport packet */ ++ uint8_t slot_count; ++}; ++ ++/* DP MST stream allocation table */ ++struct link_mst_stream_allocation_table { ++ /* number of DP video streams */ ++ int stream_count; ++ /* array of stream allocations */ ++ struct link_mst_stream_allocation ++ stream_allocations[MAX_CONTROLLER_NUM]; ++}; ++ + struct core_link { + struct dc_link public; + const struct dc *dc; +@@ -221,11 +240,10 @@ struct core_link { + enum edp_revision edp_revision; + + /* MST record stream using this link */ +- struct dp_mst_stream_allocation_table stream_alloc_table; +- + struct link_flags { + bool dp_keep_receiver_powered; + } wa_flags; ++ struct link_mst_stream_allocation_table mst_stream_alloc_table; + }; + + #define DC_LINK_TO_LINK(dc_link) container_of(dc_link, struct core_link, public) +@@ -248,10 +266,6 @@ void core_link_disable_stream( + struct core_link *link, + struct core_stream *stream); + +-void core_link_update_stream( +- struct core_link *link, +- struct core_stream *stream); +- + /********** DAL Core*********************/ + #include "display_clock_interface.h" + +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h b/drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h +index f63c479..95defa8 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h +@@ -55,7 +55,7 @@ struct link_encoder_funcs { + const struct encoder_set_dp_phy_pattern_param *para); + void (*update_mst_stream_allocation_table)( + struct link_encoder *enc, +- const struct dp_mst_stream_allocation_table *table); ++ const struct link_mst_stream_allocation_table *table); + void (*set_lcd_backlight_level) (struct link_encoder *enc, + uint32_t level); + void (*backlight_control) (struct link_encoder *enc, +diff --git a/drivers/gpu/drm/amd/dal/dc/virtual/virtual_link_encoder.c b/drivers/gpu/drm/amd/dal/dc/virtual/virtual_link_encoder.c +index 5fa9af8..4d48daa 100644 +--- a/drivers/gpu/drm/amd/dal/dc/virtual/virtual_link_encoder.c ++++ b/drivers/gpu/drm/amd/dal/dc/virtual/virtual_link_encoder.c +@@ -69,7 +69,7 @@ static void virtual_link_encoder_dp_set_phy_pattern( + + static void virtual_link_encoder_update_mst_stream_allocation_table( + struct link_encoder *enc, +- const struct dp_mst_stream_allocation_table *table) {} ++ const struct link_mst_stream_allocation_table *table) {} + + static void virtual_link_encoder_set_lcd_backlight_level( + struct link_encoder *enc, +diff --git a/drivers/gpu/drm/amd/dal/include/link_service_types.h b/drivers/gpu/drm/amd/dal/include/link_service_types.h +index 573dd5c..30fc6f0 100644 +--- a/drivers/gpu/drm/amd/dal/include/link_service_types.h ++++ b/drivers/gpu/drm/amd/dal/include/link_service_types.h +@@ -391,18 +391,16 @@ struct mst_device_info { + + /* DP MST stream allocation (payload bandwidth number) */ + struct dp_mst_stream_allocation { +- /* stream engine id (DIG) */ +- const struct dc_stream *stream; +- uint32_t vcp_id; ++ uint8_t vcp_id; + /* number of slots required for the DP stream in + * transport packet */ +- uint32_t slot_count; ++ uint8_t slot_count; + }; + + /* DP MST stream allocation table */ + struct dp_mst_stream_allocation_table { + /* number of DP video streams */ +- uint8_t stream_count; ++ int stream_count; + /* array of stream allocations */ + struct dp_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM]; + }; +-- +2.7.4 + |