diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0712-drm-amd-dal-Do-not-access-mmMC_HUB_RDREQ_DMIF_LIMIT-.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0712-drm-amd-dal-Do-not-access-mmMC_HUB_RDREQ_DMIF_LIMIT-.patch | 124 |
1 files changed, 124 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0712-drm-amd-dal-Do-not-access-mmMC_HUB_RDREQ_DMIF_LIMIT-.patch b/common/recipes-kernel/linux/files/0712-drm-amd-dal-Do-not-access-mmMC_HUB_RDREQ_DMIF_LIMIT-.patch new file mode 100644 index 00000000..e3680fa6 --- /dev/null +++ b/common/recipes-kernel/linux/files/0712-drm-amd-dal-Do-not-access-mmMC_HUB_RDREQ_DMIF_LIMIT-.patch @@ -0,0 +1,124 @@ +From c09775dd062c6bb44e45cafabf92c43b0d711a3a Mon Sep 17 00:00:00 2001 +From: David Rokhvarg <David.Rokhvarg@amd.com> +Date: Thu, 21 Jan 2016 13:33:22 -0500 +Subject: [PATCH 0712/1110] drm/amd/dal: Do not access + mmMC_HUB_RDREQ_DMIF_LIMIT if in Diag env. + +This register is *not* a Display register and is not valid in +Diagnostics environment on FPGA/Maximus. + +Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/dal/dc/core/dc.c | 4 +-- + .../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c | 33 +++++++++++++--------- + drivers/gpu/drm/amd/dal/dc/inc/core_dc.h | 6 ---- + drivers/gpu/drm/amd/dal/include/dal_types.h | 6 ++++ + 4 files changed, 27 insertions(+), 22 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc.c b/drivers/gpu/drm/amd/dal/dc/core/dc.c +index b68ecb7..81bcc1e 100644 +--- a/drivers/gpu/drm/amd/dal/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/dal/dc/core/dc.c +@@ -335,9 +335,9 @@ static bool construct(struct dc *dc, const struct dal_init_data *init_params) + + dc->ctx = dc_init_data.ctx; + +- dc->dce_version = dal_adapter_service_get_dce_version( ++ dc->ctx->dce_version = dal_adapter_service_get_dce_version( + dc_init_data.adapter_srv); +- dc->dce_environment = dal_adapter_service_get_dce_environment( ++ dc->ctx->dce_environment = dal_adapter_service_get_dce_environment( + dc_init_data.adapter_srv); + + /* Create hardware sequencer */ +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c +index 5c76d15..392a075 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c +@@ -842,13 +842,16 @@ void dce110_mem_input_allocate_dmif_buffer( + * 02 - enable DMIF rdreq limit, disable by DMIF stall = 1 + * 03 - force enable DMIF rdreq limit, ignore DMIF stall / urgent + */ +- addr = mmMC_HUB_RDREQ_DMIF_LIMIT; +- value = dal_read_reg(mi->ctx, addr); +- if (paths_num > 1) +- set_reg_field_value(value, 0, MC_HUB_RDREQ_DMIF_LIMIT, ENABLE); +- else +- set_reg_field_value(value, 3, MC_HUB_RDREQ_DMIF_LIMIT, ENABLE); +- dal_write_reg(mi->ctx, addr, value); ++ if (!IS_DIAG_MAXIMUS_DC(mi->ctx)) { ++ addr = mmMC_HUB_RDREQ_DMIF_LIMIT; ++ value = dal_read_reg(mi->ctx, addr); ++ ++ if (paths_num > 1) ++ set_reg_field_value(value, 0, MC_HUB_RDREQ_DMIF_LIMIT, ENABLE); ++ else ++ set_reg_field_value(value, 3, MC_HUB_RDREQ_DMIF_LIMIT, ENABLE); ++ dal_write_reg(mi->ctx, addr, value); ++ } + + register_underflow_int: + /*todo*/; +@@ -909,13 +912,15 @@ void dce110_mem_input_deallocate_dmif_buffer( + * 02 - enable dmif rdreq limit, disable by dmif stall=1 + * 03 - force enable dmif rdreq limit, ignore dmif stall/urgent + * Stella Wong proposed this change. */ +- value = dal_read_reg(mi->ctx, mmMC_HUB_RDREQ_DMIF_LIMIT); +- if (paths_num > 1) +- set_reg_field_value(value, 0, MC_HUB_RDREQ_DMIF_LIMIT, ENABLE); +- else +- set_reg_field_value(value, 3, MC_HUB_RDREQ_DMIF_LIMIT, ENABLE); +- +- dal_write_reg(mi->ctx, mmMC_HUB_RDREQ_DMIF_LIMIT, value); ++ if (!IS_DIAG_MAXIMUS_DC(mi->ctx)) { ++ value = dal_read_reg(mi->ctx, mmMC_HUB_RDREQ_DMIF_LIMIT); ++ if (paths_num > 1) ++ set_reg_field_value(value, 0, MC_HUB_RDREQ_DMIF_LIMIT, ENABLE); ++ else ++ set_reg_field_value(value, 3, MC_HUB_RDREQ_DMIF_LIMIT, ENABLE); ++ ++ dal_write_reg(mi->ctx, mmMC_HUB_RDREQ_DMIF_LIMIT, value); ++ } + } + + static struct mem_input_funcs dce110_mem_input_funcs = { +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h b/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h +index be46f97..9d62a24 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h +@@ -34,12 +34,6 @@ struct dc { + + /* HW functions */ + struct hw_sequencer_funcs hwss; +- +- /* Diagnostics */ +- enum dce_version dce_version; +- enum dce_environment dce_environment; + }; + +-#define IS_DIAGNOSTICS_DC(dc) ((dc)->dce_environment == DCE_ENV_DIAG_FPGA_MAXIMUS) +- + #endif /* __CORE_DC_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/include/dal_types.h b/drivers/gpu/drm/amd/dal/include/dal_types.h +index 8e54862..73c13c4 100644 +--- a/drivers/gpu/drm/amd/dal/include/dal_types.h ++++ b/drivers/gpu/drm/amd/dal/include/dal_types.h +@@ -178,8 +178,14 @@ struct dc_context { + + struct dal_logger *logger; + void *cgs_device; ++ ++ /* Diagnostics */ ++ enum dce_version dce_version; ++ enum dce_environment dce_environment; + }; + ++#define IS_DIAG_MAXIMUS_DC(dcctx) ((dcctx)->dce_environment == DCE_ENV_DIAG_FPGA_MAXIMUS) ++ + /* Wireless display structs */ + + union dal_remote_display_cea_mode_bitmap { +-- +2.7.4 + |