aboutsummaryrefslogtreecommitdiffstats
path: root/common/recipes-kernel/linux/files/0698-drm-amd-dal-Refactor-mem_input.patch
diff options
context:
space:
mode:
Diffstat (limited to 'common/recipes-kernel/linux/files/0698-drm-amd-dal-Refactor-mem_input.patch')
-rw-r--r--common/recipes-kernel/linux/files/0698-drm-amd-dal-Refactor-mem_input.patch387
1 files changed, 0 insertions, 387 deletions
diff --git a/common/recipes-kernel/linux/files/0698-drm-amd-dal-Refactor-mem_input.patch b/common/recipes-kernel/linux/files/0698-drm-amd-dal-Refactor-mem_input.patch
deleted file mode 100644
index 7e02ef1a..00000000
--- a/common/recipes-kernel/linux/files/0698-drm-amd-dal-Refactor-mem_input.patch
+++ /dev/null
@@ -1,387 +0,0 @@
-From c6ee9d1602d2f0c99e7904d938c70a1b712ab0de Mon Sep 17 00:00:00 2001
-From: Yongqiang Sun <yongqiang.sun@amd.com>
-Date: Mon, 18 Jan 2016 16:47:07 -0500
-Subject: [PATCH 0698/1110] drm/amd/dal: Refactor mem_input.
-
-Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
-Acked-by: Jordan Lazare <Jordan.Lazare@amd.com>
----
- .../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 15 +++--
- .../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c | 77 ++++++++++------------
- .../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h | 8 +--
- .../gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 63 ++++++++++++++++--
- .../amd/dal/dc/dce110/dce110_timing_generator.h | 3 +
- drivers/gpu/drm/amd/dal/dc/inc/mem_input.h | 29 ++++++++
- 6 files changed, 135 insertions(+), 60 deletions(-)
-
-diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
-index fbcd799..14ad0cd 100644
---- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
-+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
-@@ -826,7 +826,7 @@ static enum dc_status apply_single_controller_ctx_to_hw(uint8_t controller_idx,
- }
-
- /*TODO: mst support - use total stream count*/
-- dce110_mem_input_allocate_dmif_buffer(
-+ stream->mi->funcs->mem_input_allocate_dmif_buffer(
- stream->mi,
- &stream->public.timing,
- context->target_count);
-@@ -1156,7 +1156,7 @@ static void set_displaymarks(
- struct core_stream *stream =
- DC_STREAM_TO_CORE(target->public.streams[j]);
-
-- dce110_mem_input_program_display_marks(
-+ stream->mi->funcs->mem_input_program_display_marks(
- stream->mi,
- context->bw_results
- .nbp_state_change_wm_ns[total_streams],
-@@ -1185,7 +1185,8 @@ static void set_safe_displaymarks(struct validate_context *context)
- struct core_stream *stream =
- DC_STREAM_TO_CORE(target->public.streams[j]);
-
-- dce110_mem_input_program_safe_display_marks(stream->mi);
-+ stream->mi->funcs->mem_input_program_safe_display_marks(
-+ stream->mi);
- }
- }
- }
-@@ -1510,7 +1511,7 @@ static bool set_plane_config(
- path_mode->mode.timing.pixel_encoding);
- #endif
-
-- dce110_mem_input_program_surface_config(
-+ mi->funcs->mem_input_program_surface_config(
- mi,
- surface->public.format,
- &surface->public.tiling_info,
-@@ -1546,7 +1547,8 @@ static bool update_plane_address(
- PIPE_LOCK_CONTROL_SURFACE,
- true);
-
-- if (false == dce110_mem_input_program_surface_flip_and_addr(
-+ if (false ==
-+ core_stream->mi->funcs->mem_input_program_surface_flip_and_addr(
- mi, &surface->public.address, surface->public.flip_immediate))
- return false;
-
-@@ -1578,7 +1580,8 @@ static void reset_single_stream_hw_ctx(struct core_stream *stream,
-
- stream->tg->funcs->set_blank(stream->tg, true);
- stream->tg->funcs->disable_crtc(stream->tg);
-- dce110_mem_input_deallocate_dmif_buffer(stream->mi, context->target_count);
-+ stream->mi->funcs->mem_input_deallocate_dmif_buffer(
-+ stream->mi, context->target_count);
- dce110_transform_set_scaler_bypass(stream->xfm);
- disable_stereo_mixer(stream->ctx);
- unreference_clock_source(&context->res_ctx, stream->clock_source);
-diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c
-index ab2241d..5c76d15 100644
---- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c
-+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c
-@@ -43,26 +43,6 @@
- #define DMIF_REG(reg) (reg + mem_input110->offsets.dmif)
- #define PIPE_REG(reg) (reg + mem_input110->offsets.pipe)
-
--static const struct dce110_mem_input_reg_offsets reg_offsets[] = {
--{
-- .dcp = 0,
-- .dmif = 0,
-- .pipe = 0,
--},
--{
-- .dcp = (mmDCP1_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
-- .dmif = (mmDMIF_PG1_DPG_WATERMARK_MASK_CONTROL
-- - mmDMIF_PG0_DPG_WATERMARK_MASK_CONTROL),
-- .pipe = (mmPIPE1_DMIF_BUFFER_CONTROL - mmPIPE0_DMIF_BUFFER_CONTROL),
--},
--{
-- .dcp = (mmDCP2_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
-- .dmif = (mmDMIF_PG2_DPG_WATERMARK_MASK_CONTROL
-- - mmDMIF_PG0_DPG_WATERMARK_MASK_CONTROL),
-- .pipe = (mmPIPE2_DMIF_BUFFER_CONTROL - mmPIPE0_DMIF_BUFFER_CONTROL),
--}
--};
--
- static void set_flip_control(
- struct dce110_mem_input *mem_input110,
- bool immediate)
-@@ -445,6 +425,19 @@ static void program_pixel_format(
- }
- }
-
-+static void wait_for_no_surface_update_pending(
-+ struct dce110_mem_input *mem_input110)
-+{
-+ uint32_t value;
-+
-+ do {
-+ value = dal_read_reg(mem_input110->base.ctx,
-+ DCP_REG(mmGRPH_UPDATE));
-+
-+ } while (get_reg_field_value(value, GRPH_UPDATE,
-+ GRPH_SURFACE_UPDATE_PENDING));
-+}
-+
- bool dce110_mem_input_program_surface_flip_and_addr(
- struct mem_input *mem_input,
- const struct dc_plane_address *address,
-@@ -456,6 +449,9 @@ bool dce110_mem_input_program_surface_flip_and_addr(
- program_addr(mem_input110,
- address);
-
-+ if (flip_immediate)
-+ wait_for_no_surface_update_pending(mem_input110);
-+
- return true;
- }
-
-@@ -922,6 +918,19 @@ void dce110_mem_input_deallocate_dmif_buffer(
- dal_write_reg(mi->ctx, mmMC_HUB_RDREQ_DMIF_LIMIT, value);
- }
-
-+static struct mem_input_funcs dce110_mem_input_funcs = {
-+ .mem_input_program_safe_display_marks =
-+ dce110_mem_input_program_safe_display_marks,
-+ .mem_input_program_display_marks =
-+ dce110_mem_input_program_display_marks,
-+ .mem_input_allocate_dmif_buffer = dce110_mem_input_allocate_dmif_buffer,
-+ .mem_input_deallocate_dmif_buffer =
-+ dce110_mem_input_deallocate_dmif_buffer,
-+ .mem_input_program_surface_flip_and_addr =
-+ dce110_mem_input_program_surface_flip_and_addr,
-+ .mem_input_program_surface_config =
-+ dce110_mem_input_program_surface_config,
-+};
- /*****************************************/
- /* Constructor, Destructor */
- /*****************************************/
-@@ -929,16 +938,15 @@ void dce110_mem_input_deallocate_dmif_buffer(
- bool dce110_mem_input_construct(
- struct dce110_mem_input *mem_input110,
- struct dc_context *ctx,
-- uint32_t inst)
-+ uint32_t inst,
-+ const struct dce110_mem_input_reg_offsets *offsets)
- {
-- if (inst >= ARRAY_SIZE(reg_offsets))
-- return false;
--
-+ mem_input110->base.funcs = &dce110_mem_input_funcs;
- mem_input110->base.ctx = ctx;
-
- mem_input110->base.inst = inst;
-
-- mem_input110->offsets = reg_offsets[inst];
-+ mem_input110->offsets = *offsets;
-
- mem_input110->supported_stutter_mode = 0;
- dal_adapter_service_get_feature_value(FEATURE_STUTTER_MODE,
-@@ -953,22 +961,3 @@ void dce110_mem_input_destroy(struct mem_input **mem_input)
- dc_service_free((*mem_input)->ctx, TO_DCE110_MEM_INPUT(*mem_input));
- *mem_input = NULL;
- }
--
--struct mem_input *dce110_mem_input_create(
-- struct dc_context *ctx,
-- uint32_t inst)
--{
-- struct dce110_mem_input *mem_input110 =
-- dc_service_alloc(ctx, sizeof(struct dce110_mem_input));
--
-- if (!mem_input110)
-- return NULL;
--
-- if (dce110_mem_input_construct(mem_input110,
-- ctx, inst))
-- return &mem_input110->base;
--
-- BREAK_TO_DEBUGGER();
-- dc_service_free(ctx, mem_input110);
-- return NULL;
--}
-diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h
-index 7392750..997070b 100644
---- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h
-+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h
-@@ -42,11 +42,11 @@ struct dce110_mem_input {
- uint32_t supported_stutter_mode;
- };
-
--struct mem_input *dce110_mem_input_create(
-+bool dce110_mem_input_construct(
-+ struct dce110_mem_input *mem_input110,
- struct dc_context *ctx,
-- uint32_t inst);
--
--void dce110_mem_input_destroy(struct mem_input **mem_input);
-+ uint32_t inst,
-+ const struct dce110_mem_input_reg_offsets *offsets);
-
- /*
- * dce110_mem_input_program_display_marks
-diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
-index 565f9cb..49c70fc 100644
---- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
-+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
-@@ -80,6 +80,29 @@ static const struct dce110_stream_enc_offsets dce110_str_enc_offsets[] = {
- }
- };
-
-+static const struct dce110_mem_input_reg_offsets dce110_mi_reg_offsets[] = {
-+ {
-+ .dcp = (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
-+ .dmif = (mmDMIF_PG0_DPG_WATERMARK_MASK_CONTROL
-+ - mmDPG_WATERMARK_MASK_CONTROL),
-+ .pipe = (mmPIPE0_DMIF_BUFFER_CONTROL
-+ - mmPIPE0_DMIF_BUFFER_CONTROL),
-+ },
-+ {
-+ .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
-+ .dmif = (mmDMIF_PG1_DPG_WATERMARK_MASK_CONTROL
-+ - mmDPG_WATERMARK_MASK_CONTROL),
-+ .pipe = (mmPIPE1_DMIF_BUFFER_CONTROL
-+ - mmPIPE0_DMIF_BUFFER_CONTROL),
-+ },
-+ {
-+ .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
-+ .dmif = (mmDMIF_PG2_DPG_WATERMARK_MASK_CONTROL
-+ - mmDPG_WATERMARK_MASK_CONTROL),
-+ .pipe = (mmPIPE2_DMIF_BUFFER_CONTROL
-+ - mmPIPE0_DMIF_BUFFER_CONTROL),
-+ }
-+};
-
- static struct timing_generator *dce110_timing_generator_create(
- struct adapter_service *as,
-@@ -121,6 +144,26 @@ static struct stream_encoder *dce110_stream_encoder_create(
- return NULL;
- }
-
-+static struct mem_input *dce110_mem_input_create(
-+ struct dc_context *ctx,
-+ uint32_t inst,
-+ const struct dce110_mem_input_reg_offsets *offset)
-+{
-+ struct dce110_mem_input *mem_input110 =
-+ dc_service_alloc(ctx, sizeof(struct dce110_mem_input));
-+
-+ if (!mem_input110)
-+ return NULL;
-+
-+ if (dce110_mem_input_construct(mem_input110,
-+ ctx, inst, offset))
-+ return &mem_input110->base;
-+
-+ BREAK_TO_DEBUGGER();
-+ dc_service_free(ctx, mem_input110);
-+ return NULL;
-+}
-+
- bool dce110_construct_resource_pool(
- struct adapter_service *adapter_serv,
- struct dc *dc,
-@@ -198,7 +241,8 @@ bool dce110_construct_resource_pool(
- goto controller_create_fail;
- }
-
-- pool->mis[i] = dce110_mem_input_create(ctx, i);
-+ pool->mis[i] = dce110_mem_input_create(ctx, i,
-+ &dce110_mi_reg_offsets[i]);
- if (pool->mis[i] == NULL) {
- BREAK_TO_DEBUGGER();
- dal_error(
-@@ -298,11 +342,15 @@ controller_create_fail:
- if (pool->ipps[i] != NULL)
- dce110_ipp_destroy(&pool->ipps[i]);
-
-- if (pool->mis[i] != NULL)
-- dce110_mem_input_destroy(&pool->mis[i]);
-+ if (pool->mis[i] != NULL) {
-+ dc_service_free(pool->mis[i]->ctx,
-+ TO_DCE110_MEM_INPUT(pool->mis[i]));
-+ pool->mis[i] = NULL;
-+ }
-
- if (pool->timing_generators[i] != NULL) {
-- dc_service_free(pool->timing_generators[i]->ctx, DCE110TG_FROM_TG(pool->timing_generators[i]));
-+ dc_service_free(pool->timing_generators[i]->ctx,
-+ DCE110TG_FROM_TG(pool->timing_generators[i]));
- pool->timing_generators[i] = NULL;
- }
- }
-@@ -336,8 +384,11 @@ void dce110_destruct_resource_pool(struct resource_pool *pool)
- if (pool->ipps[i] != NULL)
- dce110_ipp_destroy(&pool->ipps[i]);
-
-- if (pool->mis[i] != NULL)
-- dce110_mem_input_destroy(&pool->mis[i]);
-+ if (pool->mis[i] != NULL) {
-+ dc_service_free(pool->mis[i]->ctx,
-+ TO_DCE110_MEM_INPUT(pool->mis[i]));
-+ pool->mis[i] = NULL;
-+ }
-
- if (pool->timing_generators[i] != NULL) {
- dc_service_free(pool->timing_generators[i]->ctx, DCE110TG_FROM_TG(pool->timing_generators[i]));
-diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h
-index c787530..a84ab8b 100644
---- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h
-+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h
-@@ -53,6 +53,9 @@
- struct dce110_timing_generator_offsets {
- uint32_t crtc;
- uint32_t dcp;
-+
-+ /* DCE80 use only */
-+ uint32_t dmif;
- };
-
- struct dce110_timing_generator {
-diff --git a/drivers/gpu/drm/amd/dal/dc/inc/mem_input.h b/drivers/gpu/drm/amd/dal/dc/inc/mem_input.h
-index 458e7b5..0d34248 100644
---- a/drivers/gpu/drm/amd/dal/dc/inc/mem_input.h
-+++ b/drivers/gpu/drm/amd/dal/dc/inc/mem_input.h
-@@ -30,10 +30,39 @@
- #include "dc.h"
-
- struct mem_input {
-+ struct mem_input_funcs *funcs;
- struct dc_context *ctx;
- uint32_t inst;
- };
-
-+struct mem_input_funcs {
-+ void (*mem_input_program_safe_display_marks)(struct mem_input *mi);
-+ void (*mem_input_program_display_marks)(
-+ struct mem_input *mem_input,
-+ struct bw_watermarks nbp,
-+ struct bw_watermarks stutter,
-+ struct bw_watermarks urgent,
-+ uint32_t h_total,
-+ uint32_t pixel_clk_in_khz,
-+ uint32_t pstate_blackout_duration_ns);
-+ void (*mem_input_allocate_dmif_buffer)(
-+ struct mem_input *mem_input,
-+ struct dc_crtc_timing *timing,
-+ uint32_t paths_num);
-+ void (*mem_input_deallocate_dmif_buffer)(
-+ struct mem_input *mem_input, uint32_t paths_num);
-+ bool (*mem_input_program_surface_flip_and_addr)(
-+ struct mem_input *mem_input,
-+ const struct dc_plane_address *address,
-+ bool flip_immediate);
-+ bool (*mem_input_program_surface_config)(
-+ struct mem_input *mem_input,
-+ enum surface_pixel_format format,
-+ union plane_tiling_info *tiling_info,
-+ union plane_size *plane_size,
-+ enum dc_rotation_angle rotation);
-+};
-+
- enum stutter_mode_type {
- STUTTER_MODE_LEGACY = 0X00000001,
- STUTTER_MODE_ENHANCED = 0X00000002,
---
-2.7.4
-
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-18 03:43:27 +0000