diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0641-drm-amd-dal-Remove-dead-headers.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0641-drm-amd-dal-Remove-dead-headers.patch | 2319 |
1 files changed, 2319 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0641-drm-amd-dal-Remove-dead-headers.patch b/common/recipes-kernel/linux/files/0641-drm-amd-dal-Remove-dead-headers.patch new file mode 100644 index 00000000..efe9d9ce --- /dev/null +++ b/common/recipes-kernel/linux/files/0641-drm-amd-dal-Remove-dead-headers.patch @@ -0,0 +1,2319 @@ +From 359a1cc0ce2c139d86022274e682c1a7b0780018 Mon Sep 17 00:00:00 2001 +From: Harry Wentland <harry.wentland@amd.com> +Date: Thu, 17 Dec 2015 20:48:16 -0500 +Subject: [PATCH 0641/1110] drm/amd/dal: Remove dead headers + +Signed-off-by: Harry Wentland <harry.wentland@amd.com> +Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> +--- + .../gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c | 8 +- + .../drm/amd/dal/dc/dce110/dce110_transform_gamut.c | 1 - + .../drm/amd/dal/dc/dce_base/dce_base_resource.c | 1 - + drivers/gpu/drm/amd/dal/dc/gpio/gpio_service.c | 1 + + .../gpu/drm/amd/dal/include/adjustment_interface.h | 230 -------------- + drivers/gpu/drm/amd/dal/include/bit_set.h | 61 ---- + drivers/gpu/drm/amd/dal/include/dal_types.h | 4 +- + drivers/gpu/drm/amd/dal/include/dcs_interface.h | 351 --------------------- + .../gpu/drm/amd/dal/include/ddc_service_types.h | 2 - + .../amd/dal/include/default_mode_list_interface.h | 37 --- + .../gpu/drm/amd/dal/include/display_path_types.h | 132 -------- + .../dal/include/dpcd_access_service_interface.h | 65 ---- + drivers/gpu/drm/amd/dal/include/gpu_clock_info.h | 43 --- + drivers/gpu/drm/amd/dal/include/gpu_interface.h | 91 ------ + .../gpu/drm/amd/dal/include/hw_adjustment_set.h | 50 --- + .../amd/dal/include/hw_path_mode_set_interface.h | 48 --- + drivers/gpu/drm/amd/dal/include/isr_config_types.h | 157 --------- + .../gpu/drm/amd/dal/include/mode_manager_types.h | 71 ----- + .../gpu/drm/amd/dal/include/mode_query_interface.h | 93 ------ + .../amd/dal/include/mode_timing_list_interface.h | 51 --- + .../gpu/drm/amd/dal/include/overlay_interface.h | 137 -------- + drivers/gpu/drm/amd/dal/include/overlay_types.h | 164 ---------- + .../drm/amd/dal/include/path_mode_set_interface.h | 107 ------- + .../amd/dal/include/set_mode_params_interface.h | 101 ------ + .../amd/dal/include/timing_list_query_interface.h | 69 ---- + 25 files changed, 6 insertions(+), 2069 deletions(-) + delete mode 100644 drivers/gpu/drm/amd/dal/include/adjustment_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/bit_set.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/dcs_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/default_mode_list_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/display_path_types.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/dpcd_access_service_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/gpu_clock_info.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/gpu_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/hw_adjustment_set.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/hw_path_mode_set_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/isr_config_types.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/mode_manager_types.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/mode_query_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/mode_timing_list_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/overlay_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/overlay_types.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/path_mode_set_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/set_mode_params_interface.h + delete mode 100644 drivers/gpu/drm/amd/dal/include/timing_list_query_interface.h + +diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c +index 0062404..e142508 100644 +--- a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c ++++ b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c +@@ -37,12 +37,6 @@ + #undef FRAME_SIZE + #undef DEPRECATED + +-#include "mode_query_interface.h" +-#include "dcs_types.h" +-#include "mode_manager_types.h" +- +-/*#include "amdgpu_buffer.h"*/ +- + #include "dce/dce_11_0_d.h" + #include "dce/dce_11_0_sh_mask.h" + #include "dce/dce_11_0_enum.h" +@@ -505,6 +499,8 @@ static void fill_plane_attributes_from_fb( + + } + ++#define NUM_OF_RAW_GAMMA_RAMP_RGB_256 256 ++ + static void fill_gamma_from_crtc( + const struct drm_crtc *crtc, + struct dc_surface *dc_surface) +diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_gamut.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_gamut.c +index a5b5b01..0dd4355 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_gamut.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_gamut.c +@@ -27,7 +27,6 @@ + #include "dce/dce_11_0_d.h" + #include "dce/dce_11_0_sh_mask.h" + #include "include/fixed31_32.h" +-#include "include/hw_sequencer_types.h" + #include "basics/conversion.h" + #include "include/grph_object_id.h" + +diff --git a/drivers/gpu/drm/amd/dal/dc/dce_base/dce_base_resource.c b/drivers/gpu/drm/amd/dal/dc/dce_base/dce_base_resource.c +index 8996475..3633402 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dce_base/dce_base_resource.c ++++ b/drivers/gpu/drm/amd/dal/dc/dce_base/dce_base_resource.c +@@ -26,7 +26,6 @@ + + #include "dc_services.h" + +-#include "adjustment_types.h" + #include "set_mode_types.h" + #include "stream_encoder.h" + #include "link_encoder.h" +diff --git a/drivers/gpu/drm/amd/dal/dc/gpio/gpio_service.c b/drivers/gpu/drm/amd/dal/dc/gpio/gpio_service.c +index 08e046b..660f80f 100644 +--- a/drivers/gpu/drm/amd/dal/dc/gpio/gpio_service.c ++++ b/drivers/gpu/drm/amd/dal/dc/gpio/gpio_service.c +@@ -30,6 +30,7 @@ + #include "dal_services.h" + #include "include/gpio_interface.h" + #include "include/ddc_interface.h" ++/* TODO remove dvo */ + #include "include/dvo_interface.h" + #include "include/irq_interface.h" + #include "include/gpio_service_interface.h" +diff --git a/drivers/gpu/drm/amd/dal/include/adjustment_interface.h b/drivers/gpu/drm/amd/dal/include/adjustment_interface.h +deleted file mode 100644 +index 64a9f9f..0000000 +--- a/drivers/gpu/drm/amd/dal/include/adjustment_interface.h ++++ /dev/null +@@ -1,230 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_ADJUSTMENT_INTERFACE_H__ +-#define __DAL_ADJUSTMENT_INTERFACE_H__ +- +-#include "include/display_service_types.h" +-#include "include/adjustment_types.h" +-#include "include/overlay_types.h" +-#include "include/display_path_interface.h" +- +-struct ds_underscan_desc; +-struct adj_container; +-struct info_frame; +-struct ds_dispatch; +-struct hw_adjustment_set; +-struct path_mode; +-struct hw_path_mode; +- +-enum build_path_set_reason; +- +-bool dal_ds_dispatch_is_adjustment_supported( +- struct ds_dispatch *ds, +- uint32_t display_index, +- enum adjustment_id adjust_id); +- +-enum ds_return dal_ds_dispatch_get_type( +- struct ds_dispatch *adj, +- enum adjustment_id adjust_id, +- enum adjustment_data_type *type); +- +-enum ds_return dal_ds_dispatch_get_property( +- struct ds_dispatch *adj, +- uint32_t display_index, +- enum adjustment_id adjust_id, +- union adjustment_property *property); +- +-enum ds_return dal_ds_dispatch_set_adjustment( +- struct ds_dispatch *ds, +- const uint32_t display_index, +- enum adjustment_id adjust_id, +- int32_t value); +- +-enum ds_return dal_ds_dispatch_get_adjustment_current_value( +- struct ds_dispatch *ds, +- struct adj_container *container, +- struct adjustment_info *info, +- enum adjustment_id id, +- bool fall_back_to_default); +- +-enum ds_return dal_ds_dispatch_get_adjustment_value( +- struct ds_dispatch *ds, +- struct display_path *disp_path, +- enum adjustment_id adj_id, +- bool fall_back_to_default, +- int32_t *value); +- +-const struct raw_gamma_ramp *dal_ds_dispatch_get_current_gamma( +- struct ds_dispatch *ds, +- uint32_t display_index, +- enum adjustment_id adjust_id); +- +-const struct raw_gamma_ramp *dal_ds_dispatch_get_default_gamma( +- struct ds_dispatch *ds, +- uint32_t display_index, +- enum adjustment_id adjust_id); +- +-enum ds_return dal_ds_dispatch_set_current_gamma( +- struct ds_dispatch *ds, +- uint32_t display_index, +- enum adjustment_id adjust_id, +- const struct raw_gamma_ramp *gamma); +- +-enum ds_return dal_ds_dispatch_set_gamma( +- struct ds_dispatch *ds, +- uint32_t display_index, +- enum adjustment_id adjust_id, +- const struct raw_gamma_ramp *gamma); +- +-bool dal_ds_dispatch_get_underscan_info( +- struct ds_dispatch *ds, +- uint32_t display_index, +- struct ds_underscan_info *info); +- +-bool dal_ds_dispatch_get_underscan_mode( +- struct ds_dispatch *ds, +- uint32_t display_index, +- struct ds_underscan_desc *desc); +- +-bool dal_ds_dispatch_set_underscan_mode( +- struct ds_dispatch *ds, +- uint32_t display_index, +- struct ds_underscan_desc *desc); +- +-bool dal_ds_dispatch_setup_overlay( +- struct ds_dispatch *adj, +- uint32_t display_index, +- struct overlay_data *data); +- +-struct adj_container *dal_ds_dispatch_get_adj_container_for_path( +- const struct ds_dispatch *ds, +- uint32_t display_index); +- +-void dal_ds_dispatch_set_applicable_adj( +- struct ds_dispatch *adj, +- uint32_t display_index, +- const struct adj_container *applicable); +- +-enum ds_return dal_ds_dispatch_set_color_gamut( +- struct ds_dispatch *adj, +- uint32_t display_index, +- const struct ds_set_gamut_data *data); +- +-enum ds_return dal_ds_dispatch_get_color_gamut( +- struct ds_dispatch *adj, +- uint32_t display_index, +- const struct ds_gamut_reference_data *ref, +- struct ds_get_gamut_data *data); +- +-enum ds_return dal_ds_dispatch_get_color_gamut_info( +- struct ds_dispatch *adj, +- uint32_t display_index, +- const struct ds_gamut_reference_data *ref, +- struct ds_gamut_info *data); +- +-enum ds_return dal_ds_dispatch_get_regamma_lut( +- struct ds_dispatch *adj, +- uint32_t display_index, +- struct ds_regamma_lut *data); +- +-enum ds_return dal_ds_dispatch_set_regamma_lut( +- struct ds_dispatch *adj, +- uint32_t display_index, +- struct ds_regamma_lut *data); +- +-enum ds_return dal_ds_dispatch_set_info_packets( +- struct ds_dispatch *adj, +- uint32_t display_index, +- const struct info_frame *info_frames); +- +-enum ds_return dal_ds_dispatch_get_info_packets( +- struct ds_dispatch *adj, +- uint32_t display_index, +- struct info_frame *info_frames); +- +-bool dal_ds_dispatch_initialize_adjustment(struct ds_dispatch *ds); +- +-void dal_ds_dispatch_cleanup_adjustment(struct ds_dispatch *ds); +- +-bool dal_ds_dispatch_build_post_set_mode_adj( +- struct ds_dispatch *ds, +- const struct path_mode *mode, +- struct display_path *display_path, +- struct hw_adjustment_set *set); +- +-bool dal_ds_dispatch_build_color_control_adj( +- struct ds_dispatch *ds, +- const struct path_mode *mode, +- struct display_path *display_path, +- struct hw_adjustment_set *set); +- +-bool dal_ds_dispatch_build_include_adj( +- struct ds_dispatch *ds, +- const struct path_mode *mode, +- struct display_path *display_path, +- struct hw_path_mode *hw_mode, +- struct hw_adjustment_set *set); +- +-bool dal_ds_dispatch_apply_scaling( +- struct ds_dispatch *ds, +- const struct path_mode *mode, +- struct adj_container *adj_container, +- enum build_path_set_reason reason, +- struct hw_path_mode *hw_mode); +- +-void dal_ds_dispatch_update_adj_container_for_path_with_mode_info( +- struct ds_dispatch *ds, +- struct display_path *display_path, +- const struct path_mode *path_mode); +- +-enum ds_return dal_ds_dispatch_get_adjustment_info( +- struct ds_dispatch *ds, +- uint32_t display_index, +- enum adjustment_id adjust_id, +- struct adjustment_info *adj_info); +- +-bool dal_ds_dispatch_include_adjustment( +- struct ds_dispatch *ds, +- struct display_path *disp_path, +- struct ds_adj_id_value adj, +- struct hw_adjustment_set *set); +- +-enum ds_return dal_ds_dispatch_set_gamma_adjustment( +- struct ds_dispatch *ds, +- uint32_t display_index, +- enum adjustment_id ad_id, +- const struct raw_gamma_ramp *gamma); +- +-void dal_ds_dispatch_update_adj_container_for_path_with_color_space( +- struct ds_dispatch *ds, +- uint32_t display_index, +- enum ds_color_space color_space); +- +-void dal_ds_dispatch_setup_default_regamma( +- struct ds_dispatch *ds, +- struct ds_regamma_lut *regamma); +- +-#endif /* __DAL_ADJUSTMENT_INTERFACE_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/include/bit_set.h b/drivers/gpu/drm/amd/dal/include/bit_set.h +deleted file mode 100644 +index 3cd8d32..0000000 +--- a/drivers/gpu/drm/amd/dal/include/bit_set.h ++++ /dev/null +@@ -1,61 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_BIT_SET_H__ +-#define __DAL_BIT_SET_H__ +- +-struct bit_set_iterator_32 { +- uint32_t value; +-}; +- +-static inline uint32_t least_significant_bit(uint32_t bs32_container) +-{ +- return bs32_container & (0 - bs32_container); +-} +-/* iterates over bit_set_iterator by means of least significant bit purge*/ +-static inline uint32_t get_next_significant_bit( +- struct bit_set_iterator_32 *bs32) +-{ +- uint32_t lsb = least_significant_bit(bs32->value); +- +- bs32->value &= ~lsb; +- return lsb; +-} +- +-static inline void bit_set_iterator_reset_to_mask( +- struct bit_set_iterator_32 *bs32, +- uint32_t mask) +-{ +- bs32->value = mask; +-} +- +-static inline void bit_set_iterator_construct( +- struct bit_set_iterator_32 *bs32, +- uint32_t mask) +-{ +- bit_set_iterator_reset_to_mask(bs32, mask); +-} +- +-#endif /* __DAL_BIT_SET_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/include/dal_types.h b/drivers/gpu/drm/amd/dal/include/dal_types.h +index d3c91b9..5539c19 100644 +--- a/drivers/gpu/drm/amd/dal/include/dal_types.h ++++ b/drivers/gpu/drm/amd/dal/include/dal_types.h +@@ -26,7 +26,9 @@ + #ifndef __DAL_TYPES_H__ + #define __DAL_TYPES_H__ + +-#include "dcs_types.h" ++#include "signal_types.h" ++#include "dc_types.h" ++ + struct dal_logger; + + enum dce_version { +diff --git a/drivers/gpu/drm/amd/dal/include/dcs_interface.h b/drivers/gpu/drm/amd/dal/include/dcs_interface.h +deleted file mode 100644 +index b3474cf..0000000 +--- a/drivers/gpu/drm/amd/dal/include/dcs_interface.h ++++ /dev/null +@@ -1,351 +0,0 @@ +-/* Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +-#ifndef __DAL_DCS_INTERFACE_H__ +-#define __DAL_DCS_INTERFACE_H__ +- +-#include "dcs_types.h" +-#include "grph_object_id.h" +- +-struct dal_context; +-struct dcs; +-struct ddc_service; +-enum ddc_transaction_type; +-enum ddc_result; +-struct display_sink_capability; +-enum dc_timing_3d_format; +- +-struct dcs_cea_audio_mode_list; +-struct dcs_customized_mode_list; +- +-struct dcs_init_data { +- struct dal_context *dal; +- struct adapter_service *as; +- struct timing_service *ts; +- enum dcs_interface_type interface_type; +- struct graphics_object_id grph_obj_id; +-}; +- +-struct dcs_cea_audio_mode_list *dal_dcs_cea_audio_mode_list_create( +- uint32_t list_size); +- +-void dal_dcs_cea_audio_mode_list_destroy( +- struct dcs_cea_audio_mode_list **list); +- +-bool dal_dcs_cea_audio_mode_list_append( +- struct dcs_cea_audio_mode_list *list, +- struct cea_audio_mode *cea_audio_mode); +-uint32_t dal_dcs_cea_audio_mode_list_get_count( +- const struct dcs_cea_audio_mode_list *list); +-void dal_dcs_cea_audio_mode_list_clear( +- struct dcs_cea_audio_mode_list *list); +- +-struct cea_audio_mode *dal_dcs_cea_audio_mode_list_at_index( +- const struct dcs_cea_audio_mode_list *list, +- uint32_t index); +- +-struct dcs *dal_dcs_create(const struct dcs_init_data *init_data); +- +-void dal_dcs_destroy(struct dcs **dcs); +- +-enum edid_retrieve_status dal_dcs_retrieve_raw_edid(struct dcs *dcs); +- +-uint32_t dal_dcs_get_edid_raw_data_size(struct dcs *dcs); +- +-enum edid_retrieve_status dal_dcs_override_raw_edid( +- struct dcs *dcs, +- uint32_t len, +- uint8_t *data); +- +-const uint8_t *dal_dcs_get_edid_raw_data( +- struct dcs *dcs, +- uint32_t *buff_size); +- +-enum edid_retrieve_status dal_dcs_update_edid_from_last_retrieved( +- struct dcs *dcs); +- +-/*Update DDC Service. returns the old DdcService being replaced*/ +-struct ddc_service *dal_dcs_update_ddc( +- struct dcs *dcs, +- struct ddc_service *ddc); +- +-void dal_dcs_set_transaction_type( +- struct dcs *dcs, +- enum ddc_transaction_type type); +- +-/*updates the ModeTimingList of given path with +-ModeTiming reported by this DCS*/ +-void dal_dcs_update_ts_timing_list_on_display( +- struct dcs *dcs, +- uint32_t display_index); +- +-/* DDC query on generic slave address*/ +-bool dal_dcs_query_ddc_data( +- struct dcs *dcs, +- uint32_t address, +- uint8_t *write_buf, +- uint32_t write_buff_size, +- uint8_t *read_buff, +- uint32_t read_buff_size); +- +-bool dal_dcs_get_vendor_product_id_info( +- struct dcs *dcs, +- struct vendor_product_id_info *info); +- +-bool dal_dcs_get_display_name(struct dcs *dcs, uint8_t *name, uint32_t size); +- +-bool dal_dcs_get_display_characteristics( +- struct dcs *dcs, +- struct display_characteristics *characteristics); +- +-bool dal_dcs_get_screen_info( +- struct dcs *dcs, +- struct edid_screen_info *info); +- +-enum dcs_edid_connector_type dal_dcs_get_connector_type(struct dcs *dcs); +- +-bool dal_dcs_get_display_pixel_encoding( +- struct dcs *dcs, +- struct display_pixel_encoding_support *pe); +- +-enum display_dongle_type dal_dcs_get_dongle_type(struct dcs *dcs); +- +-void dal_dcs_query_sink_capability( +- struct dcs *dcs, +- struct display_sink_capability *sink_cap, +- bool hpd_sense_bit); +- +-void dal_dcs_reset_sink_capability(struct dcs *dcs); +- +-bool dal_dcs_get_sink_capability( +- struct dcs *dcs, +- struct display_sink_capability *sink_cap); +- +-bool dal_dcs_emulate_sink_capability( +- struct dcs *dcs, +- struct display_sink_capability *sink_cap); +- +-bool dal_dcs_get_display_color_depth( +- struct dcs *dcs, +- struct display_color_depth_support *color_depth); +- +-bool dal_dcs_get_display_pixel_encoding( +- struct dcs *dcs, +- struct display_pixel_encoding_support *pixel_encoding); +- +-bool dal_dcs_get_cea861_support( +- struct dcs *dcs, +- struct cea861_support *cea861_support); +- +-bool dal_dcs_get_cea_vendor_specific_data_block( +- struct dcs *dcs, +- struct cea_vendor_specific_data_block *vendor_block); +- +-bool dal_dcs_get_cea_speaker_allocation_data_block( +- struct dcs *dcs, +- enum signal_type signal, +- union cea_speaker_allocation_data_block *spkr_data); +- +-bool dal_dcs_get_cea_colorimetry_data_block( +- struct dcs *dcs, +- struct cea_colorimetry_data_block *colorimetry_data_block); +- +-bool dal_dcs_get_cea_video_capability_data_block( +- struct dcs *dcs, +- union cea_video_capability_data_block *video_capability_data_block); +- +-uint32_t dal_dcs_get_extensions_num(struct dcs *dcs); +- +-const struct dcs_cea_audio_mode_list *dal_dcs_get_cea_audio_modes( +- struct dcs *dcs, +- enum signal_type signal); +- +-bool dal_dcs_is_audio_supported(struct dcs *dcs); +- +-bool dal_dcs_validate_customized_mode( +- struct dcs *dcs, +- const struct dcs_customized_mode *customized_mode); +- +-bool dal_dcs_add_customized_mode( +- struct dcs *dcs, +- struct dcs_customized_mode *customized_mode); +- +-bool dal_dcs_delete_customized_mode(struct dcs *dcs, uint32_t index); +- +-const struct dcs_customized_mode_list *dal_dcs_get_customized_modes( +- struct dcs *dcs); +- +-bool dal_dcs_delete_mode_timing_override( +- struct dcs *dcs, +- struct dcs_override_mode_timing *dcs_mode_timing); +- +-bool dal_dcs_set_mode_timing_override( +- struct dcs *dcs, +- uint32_t display_index, +- struct dcs_override_mode_timing *dcs_mode_timing); +- +-bool dal_dcs_get_timing_override_for_mode( +- struct dcs *dcs, +- uint32_t display_index, +- struct dc_mode_info *mode_info, +- struct dcs_override_mode_timing_list *dcs_mode_timing_list); +- +-uint32_t dal_dcs_get_num_mode_timing_overrides(struct dcs *dcs); +- +-bool dal_dcs_get_timing_override_list( +- struct dcs *dcs, +- uint32_t display_index, +- struct dcs_override_mode_timing_list *dcs_mode_timing_list, +- uint32_t size); +- +-bool dal_dcs_get_supported_force_hdtv_mode( +- struct dcs *dcs, +- union hdtv_mode_support *hdtv_mode); +- +-bool dal_dcs_get_user_force_hdtv_mode( +- struct dcs *dcs, +- union hdtv_mode_support *hdtv_mode); +- +-bool dal_dcs_set_user_force_hdtv_mode( +- struct dcs *dcs, +- const union hdtv_mode_support *hdtv_mode); +- +-bool dal_dcs_get_fid9204_allow_ce_mode_only_option( +- struct dcs *dcs, +- bool is_hdmi, +- bool *enable); +- +-bool dal_dcs_set_fid9204_allow_ce_mode_only_option( +- struct dcs *dcs, +- bool is_hdmi, +- bool enable); +- +-bool dal_dcs_get_panel_misc_info( +- struct dcs *dcs, +- union panel_misc_info *panel_info); +- +-enum ddc_result dal_dcs_dpcd_read( +- struct dcs *dcs, +- uint32_t address, +- uint8_t *buffer, +- uint32_t length); +- +-enum ddc_result dal_dcs_dpcd_write( +- struct dcs *dcs, +- uint32_t address, +- const uint8_t *buffer, +- uint32_t length); +- +-bool dal_dcs_get_range_limit( +- struct dcs *dcs, +- struct display_range_limits *limit); +- +-bool dal_dcs_set_range_limit_override( +- struct dcs *dcs, +- struct display_range_limits *limit); +- +-bool dal_dcs_get_user_select_limit( +- struct dcs *dcs, +- struct monitor_user_select_limits *limit); +- +-bool dal_dcs_set_user_select_limit( +- struct dcs *dcs, +- struct monitor_user_select_limits *limit); +- +-bool dal_dcs_get_dongle_mode_support( +- struct dcs *dcs, +- union hdtv_mode_support *hdtv_mode); +- +-bool dal_dcs_get_timing_limits( +- struct dcs *dcs, +- struct timing_limits *timing_limits); +- +-bool dal_dcs_get_drr_config( +- struct dcs *dcs, +- struct drr_config *config); +- +-bool dal_dcs_force_dp_audio(struct dcs *dcs, bool force_audio_on); +- +-bool dal_dcs_is_dp_audio_forced(struct dcs *dcs); +- +-const struct monitor_patch_info *dal_dcs_get_monitor_patch_info( +- struct dcs *dcs, +- enum monitor_patch_type patch_type); +- +-bool dal_dcs_set_monitor_patch_info( +- struct dcs *dcs, +- struct monitor_patch_info *patch_info); +- +-union dcs_monitor_patch_flags dal_dcs_get_monitor_patch_flags(struct dcs *dcs); +- +-enum dcs_packed_pixel_format dal_dcs_get_enabled_packed_pixel_format( +- struct dcs *dcs); +- +-enum dcs_packed_pixel_format dal_dcs_get_monitor_packed_pixel_format( +- struct dcs *dcs); +- +-bool dal_dcs_report_single_selected_timing(struct dcs *dcs); +- +-bool dal_dcs_can_tile_scale(struct dcs *dcs); +- +-void dal_dcs_set_single_selected_timing_restriction( +- struct dcs *dcs, +- bool value); +- +-const struct dcs_edid_supported_max_bw *dal_dcs_get_edid_supported_max_bw( +- struct dcs *dcs); +- +-bool dal_dcs_is_non_continous_frequency(struct dcs *dcs); +- +-struct dcs_stereo_3d_features dal_dcs_get_stereo_3d_features( +- struct dcs *dcs, +- enum dc_timing_3d_format format); +- +-union stereo_3d_support dal_dcs_get_stereo_3d_support(struct dcs *dcs); +- +-void dal_dcs_override_stereo_3d_support( +- struct dcs *dcs, +- union stereo_3d_support support); +- +-void dal_dcs_set_remote_display_receiver_capabilities( +- struct dcs *dcs, +- const struct dal_remote_display_receiver_capability *cap); +- +-void dal_dcs_clear_remote_display_receiver_capabilities(struct dcs *dcs); +- +-bool dal_dcs_get_display_tile_info( +- struct dcs *dcs, +- struct dcs_display_tile *display_tile, +- bool first_display); +- +-bool dal_dcs_get_container_id(struct dcs *dcs, +- struct dcs_container_id *container_id); +- +-bool dal_dcs_set_container_id(struct dcs *dcs, +- struct dcs_container_id *container_id); +- +-void dal_dcs_invalidate_container_id(struct dcs *dcs); +- +-union dcs_monitor_patch_flags dal_dcs_get_monitor_patch_flags(struct dcs *dcs); +- +-#endif /* __DAL_DCS_INTERFACE_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/include/ddc_service_types.h b/drivers/gpu/drm/amd/dal/include/ddc_service_types.h +index 47ad2ed..21fd17e 100644 +--- a/drivers/gpu/drm/amd/dal/include/ddc_service_types.h ++++ b/drivers/gpu/drm/amd/dal/include/ddc_service_types.h +@@ -25,8 +25,6 @@ + #ifndef __DAL_DDC_SERVICE_TYPES_H__ + #define __DAL_DDC_SERVICE_TYPES_H__ + +-#include "include/hw_sequencer_types.h" +- + #define DP_BRANCH_DEVICE_ID_1 0x0010FA + #define DP_BRANCH_DEVICE_ID_2 0x0022B9 + #define DP_SINK_DEVICE_ID_1 0x4CE000 +diff --git a/drivers/gpu/drm/amd/dal/include/default_mode_list_interface.h b/drivers/gpu/drm/amd/dal/include/default_mode_list_interface.h +deleted file mode 100644 +index 35a5695..0000000 +--- a/drivers/gpu/drm/amd/dal/include/default_mode_list_interface.h ++++ /dev/null +@@ -1,37 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_DEFAULT_MODE_LIST_INTERFACE_H__ +-#define __DAL_DEFAULT_MODE_LIST_INTERFACE_H__ +- +-struct default_mode_list; +- +-uint32_t dal_default_mode_list_get_count(const struct default_mode_list *dml); +- +-struct dc_mode_info *dal_default_mode_list_get_mode_info_at_index( +- const struct default_mode_list *dml, +- uint32_t index); +- +-#endif /*__DAL_DEFAULT_MODE_LIST_INTERFACE_H__*/ +diff --git a/drivers/gpu/drm/amd/dal/include/display_path_types.h b/drivers/gpu/drm/amd/dal/include/display_path_types.h +deleted file mode 100644 +index 8aac46d..0000000 +--- a/drivers/gpu/drm/amd/dal/include/display_path_types.h ++++ /dev/null +@@ -1,132 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_DISPLAY_PATH_TYPES_H__ +-#define __DAL_DISPLAY_PATH_TYPES_H__ +- +-#include "grph_object_defs.h" +- +-enum { +- CONTROLLER_HANDLE_INVALID = (uint32_t) (-1) +-}; +- +-/*Limit maximum number of cofunctional paths*/ +-enum { +- MAX_COFUNCTIONAL_PATHS = 6 +-}; +- +-struct pixel_clock_safe_range { +- uint32_t min_frequency; +- uint32_t max_frequency; +-}; +- +-/** +- * ClockSharingGroup +- * Enumeration of Clock Source Sharing categories +- * Instead using enum we define valid range for clock sharing group values +- * This is because potential num of group can be pretty big +- */ +- +-enum clock_sharing_group { +- /* Default group for display paths that cannot share clock source. +- * Display path in such group will aqcuire clock source exclusively*/ +- CLOCK_SHARING_GROUP_EXCLUSIVE = 0, +- /* DisplayPort paths will have this group if clock sharing +- * level is DisplayPortShareable*/ +- CLOCK_SHARING_GROUP_DISPLAY_PORT = 1, +- /* Mst paths will have this group if clock sharing +- * level is DpMstShareable*/ +- CLOCK_SHARING_GROUP_DP_MST = 2, +- /* Display paths will have this group when +- * desired to use alternative DPRef clock source.*/ +- CLOCK_SHARING_GROUP_ALTERNATIVE_DP_REF = 3, +- /* Start of generic SW sharing groups.*/ +- CLOCK_SHARING_GROUP_GROUP1 = 4, +- /* Total number of clock sharing groups.*/ +- CLOCK_SHARING_GROUP_MAX = 32, +-}; +-/* Should be around maximal number of ever connected displays (since boot :)*/ +-/*TEMP*/ +-enum goc_link_settings_type { +- GOC_LINK_SETTINGS_TYPE_PREFERRED = 0, +- GOC_LINK_SETTINGS_TYPE_REPORTED, +- GOC_LINK_SETTINGS_TYPE_TRAINED, +- GOC_LINK_SETTINGS_TYPE_OVERRIDEN_TRAINED, +- GOC_LINK_SETTINGS_TYPE_MAX +-}; +- +-struct dp_audio_test_data { +- +- struct dp_audio_test_data_flags { +- uint32_t test_requested:1; +- uint32_t disable_video:1; +- } flags; +- +- /*struct dp_audio_test_data_flags flags;*/ +- uint32_t sampling_rate; +- uint32_t channel_count; +- uint32_t pattern_type; +- uint8_t pattern_period[8]; +-}; +- +-struct goc_link_service_data { +- struct dp_audio_test_data dp_audio_test_data; +-}; +-/* END-OF-TEMP*/ +- +- +-union display_path_properties { +- struct bit_map { +- uint32_t ALWAYS_CONNECTED:1; +- uint32_t HPD_SUPPORTED:1; +- uint32_t NON_DESTRUCTIVE_POLLING:1; +- uint32_t FORCE_CONNECT_SUPPORTED:1; +- uint32_t FAKED_PATH:1; +- uint32_t IS_BRANCH_DP_MST_PATH:1; +- uint32_t IS_ROOT_DP_MST_PATH:1; +- uint32_t IS_DP_AUDIO_SUPPORTED:1; +- uint32_t IS_HDMI_AUDIO_SUPPORTED:1; +- } bits; +- +- uint32_t raw; +-}; +- +-enum display_tri_state { +- DISPLAY_TRI_STATE_UNKNOWN = 0, +- DISPLAY_TRI_STATE_TRUE, +- DISPLAY_TRI_STATE_FALSE +-}; +- +-enum { +- MAX_NUM_OF_LINKS_PER_PATH = 2 +-}; +-enum { +- SINK_LINK_INDEX = (uint32_t) (-1) +-}; +-enum { +- ASIC_LINK_INDEX = 0 +-}; +- +-#endif /* __DAL_DISPLAY_PATH_TYPES_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/include/dpcd_access_service_interface.h b/drivers/gpu/drm/amd/dal/include/dpcd_access_service_interface.h +deleted file mode 100644 +index a942c77..0000000 +--- a/drivers/gpu/drm/amd/dal/include/dpcd_access_service_interface.h ++++ /dev/null +@@ -1,65 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifdef __DPCD_ACCESS_SERVICE_INTERFACE_HPP__ +-#define __DPCD_ACCESS_SERVICE_INTERFACE_HPP__ +- +-/* DDC service transaction error codes +- * depends on transaction status +- */ +-enum ddc_result { +- DDCRESULT_UNKNOWN = 0, +- DDCRESULT_SUCESSFULL, +- DDCRESULT_FAILEDCHANNELBUSY, +- DDCRESULT_FAILEDTIMEOUT, +- DDCRESULT_FAILEDPROTOCOLERROR, +- DDCRESULT_FAILEDNACK, +- DDCRESULT_FAILEDINCOMPLETE, +- DDCRESULT_FAILEDOPERATION, +- DDCRESULT_FAILEDINVALIDOPERATION, +- DDCRESULT_FAILEDBUFFEROVERFLOW +-}; +- +-enum { +- MaxNativeAuxTransactionSize = 16 +-}; +- +-struct display_sink_capability; +- +-/* TO DO: below functions can be moved to ddc_service (think about it)*/ +-enum ddc_result dal_ddc_read_dpcd_data( +- uint32_t address, +- unsigned char *data, +- uint32_t size); +- +-enum ddc_result dal_ddc_write_dpcd_data( +- uint32_t address, +- const unsigned char *data uint32_t size); +- +-bool dal_aux_query_dp_sink_capability(display_sink_capability *sink_cap); +-bool start_gtc_sync(void); +-bool stop_gtc_sync(void); +- +-#endif /*__DPCD_ACCESS_SERVICE_INTERFACE_HPP__*/ +diff --git a/drivers/gpu/drm/amd/dal/include/gpu_clock_info.h b/drivers/gpu/drm/amd/dal/include/gpu_clock_info.h +deleted file mode 100644 +index c9b47b2..0000000 +--- a/drivers/gpu/drm/amd/dal/include/gpu_clock_info.h ++++ /dev/null +@@ -1,43 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_GPU_CLOCK_INFO__ +-#define __DAL_GPU_CLOCK_INFO__ +- +-#include "include/gpu_interface.h" +- +-/*TODO this structures should be defined*/ +-struct gpu_static_clk_info; +-struct gpu_dynamic_clk_info; +- +-bool init_static_clk_info( +- struct gpu *gpu, +- struct gpu_static_clk_info *st_clk_info); +- +-bool update_dynamic_clk_info( +- struct gpu *gpu, +- struct gpu_dynamic_clk_info *dyn_clk_info); +- +-#endif +diff --git a/drivers/gpu/drm/amd/dal/include/gpu_interface.h b/drivers/gpu/drm/amd/dal/include/gpu_interface.h +deleted file mode 100644 +index 63262c3..0000000 +--- a/drivers/gpu/drm/amd/dal/include/gpu_interface.h ++++ /dev/null +@@ -1,91 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_GPU_INTERFACE__ +-#define __DAL_GPU_INTERFACE__ +- +-#include "include/adapter_service_interface.h" +-#include "include/grph_object_ctrl_defs.h" +- +-enum gpu_clocks_state { +- GPU_CLOCKS_STATE_INVALID, +- GPU_CLOCKS_STATE_ULTRA_LOW, +- GPU_CLOCKS_STATE_LOW, +- GPU_CLOCKS_STATE_NOMINAL, +- GPU_CLOCKS_STATE_PERFORMANCE +-}; +- +-struct gpu_clock_info { +- uint32_t min_sclk_khz; +- uint32_t max_sclk_khz; +- +- uint32_t min_mclk_khz; +- uint32_t max_mclk_khz; +- +- uint32_t min_dclk_khz; +- uint32_t max_dclk_khz; +-}; +- +-struct gpu; +-struct irq_manager; +- +-struct gpu_init_data { +- struct dc_context *ctx; +- struct adapter_service *adapter_service; +- struct irq_manager *irq_manager; +-}; +- +-struct gpu *dal_gpu_create(struct gpu_init_data *init_data); +-void dal_gpu_destroy(struct gpu **); +- +-void dal_gpu_power_up(struct gpu *); +-void dal_gpu_power_down( +- struct gpu *gpu, +- enum dc_video_power_state power_state); +-void dal_gpu_light_sleep_vbios_wa(struct gpu *gpu, bool enable); +-void dal_gpu_release_hw(struct gpu *gpu); +- +-uint32_t dal_gpu_get_num_of_functional_controllers(const struct gpu *gpu); +-uint32_t dal_gpu_get_max_num_of_primary_controllers(const struct gpu *gpu); +-uint32_t dal_gpu_get_max_num_of_underlay_controllers(const struct gpu *gpu); +-struct controller *dal_gpu_create_controller( +- struct gpu *gpu, +- uint32_t index); +-uint32_t dal_gpu_get_num_of_clock_sources(const struct gpu *gpu); +-struct clock_source *dal_gpu_create_clock_source( +- struct gpu *gpu, +- uint32_t index); +- +-/* gpu_clock_interface implementation */ +-bool dal_gpu_init_static_clock_info(struct gpu *gpu, +- struct gpu_clock_info *gpu_clk_info); +- +-bool dal_gpu_update_dynamic_clock_info(struct gpu *gpu, +- struct gpu_clock_info *gpu_clk_info); +- +-void dal_gpu_get_static_clock_info(struct gpu *gpu, +- struct gpu_clock_info *gpu_clk_info); +- +-#endif +diff --git a/drivers/gpu/drm/amd/dal/include/hw_adjustment_set.h b/drivers/gpu/drm/amd/dal/include/hw_adjustment_set.h +deleted file mode 100644 +index 10fb8e2..0000000 +--- a/drivers/gpu/drm/amd/dal/include/hw_adjustment_set.h ++++ /dev/null +@@ -1,50 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_HW_ADJUSTMENT_SET_H__ +-#define __DAL_HW_ADJUSTMENT_SET_H__ +- +-#include "include/hw_adjustment_types.h" +- +-struct hw_adjustment_gamma_ramp; +- +-struct hw_adjustment_set { +- struct hw_adjustment_gamma_ramp *gamma_ramp; +- struct hw_adjustment_deflicker *deflicker_filter; +- struct hw_adjustment_value *coherent; +- struct hw_adjustment_value *h_sync; +- struct hw_adjustment_value *v_sync; +- struct hw_adjustment_value *composite_sync; +- struct hw_adjustment_value *backlight; +- struct hw_adjustment_value *vb_level; +- struct hw_adjustment_color_control *color_control; +- union hw_adjustment_bit_depth_reduction *bit_depth; +-}; +-/* +-struct hw_adjustment *dal_adjustment_set_get_by_id( +- struct hw_adjustment_set *adjustment_set, +- enum hw_adjustment_id id);*/ +- +-#endif +diff --git a/drivers/gpu/drm/amd/dal/include/hw_path_mode_set_interface.h b/drivers/gpu/drm/amd/dal/include/hw_path_mode_set_interface.h +deleted file mode 100644 +index 28ac018..0000000 +--- a/drivers/gpu/drm/amd/dal/include/hw_path_mode_set_interface.h ++++ /dev/null +@@ -1,48 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_HW_PATH_MODE_SET_INTERFACE_H__ +-#define __DAL_HW_PATH_MODE_SET_INTERFACE_H__ +- +-struct hw_path_mode; +-struct hw_path_mode_set; +- +-struct hw_path_mode_set *dal_hw_path_mode_set_create(void); +- +-void dal_hw_path_mode_set_destroy(struct hw_path_mode_set **set); +- +-bool dal_hw_path_mode_set_add( +- struct hw_path_mode_set *set, +- struct hw_path_mode *path_mode, +- uint32_t *index); +- +-struct hw_path_mode *dal_hw_path_mode_set_get_path_by_index( +- const struct hw_path_mode_set *set, +- uint32_t index); +- +-uint32_t dal_hw_path_mode_set_get_paths_number( +- const struct hw_path_mode_set *set); +- +-#endif +diff --git a/drivers/gpu/drm/amd/dal/include/isr_config_types.h b/drivers/gpu/drm/amd/dal/include/isr_config_types.h +deleted file mode 100644 +index 2e822f0..0000000 +--- a/drivers/gpu/drm/amd/dal/include/isr_config_types.h ++++ /dev/null +@@ -1,157 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_ISR_TYPES_H__ +-#define __DAL_ISR_TYPES_H__ +- +-#include "grph_object_id.h" +-#include "dc_types.h" +- +-struct plane_config; +-enum { +- /*move to common*/ +- MAX_COFUNC_PATH_COMMON = 6, +- /*CZ worst case*/ +- MAX_NUM_PLANES = 4 +-}; +- +-enum plane_type { +- PLANE_TYPE_GRPH = 0, +- PLANE_TYPE_VIDEO +-}; +- +-struct plane_id { +- enum plane_type select; +- enum controller_id controller_id; +-}; +- +-union display_plane_mask { +- struct { +- uint32_t CLONE_PRIMARY_CONTROLLER_ID_SET:1; +- uint32_t INTERLEAVED_CONTROLLER_ID_SET:1; +- uint32_t RESERVED:30; +- } bits; +- uint32_t value; +-}; +- +-struct display_plane_format { +- /* always valid */ +- union display_plane_mask mask; +- /* always valid */ +- uint32_t display_index; +- /* always valid */ +- enum dc_timing_3d_format format; +- /* always valid */ +- enum controller_id controller_id; +- /* valid only if CLONE_PRIMARY_CONTROLLER_ID_SET on */ +- enum controller_id clone_primary_controller_id; +- /* valid only if stereo interleave mode is on */ +- enum controller_id interleave_controller_id; +- /* valid only if crtc stereo is on */ +- uint32_t right_eye_3d_polarity:1; +-}; +- +-struct display_plane_set { +- struct display_plane_format +- set_mode_formats[MAX_COFUNC_PATH_COMMON]; +- uint32_t reset_mode_index[ +- MAX_COFUNC_PATH_COMMON]; +- uint32_t num_set_mode_formats; +- uint32_t num_reset_mode_index; +-}; +- +-enum layers_setup { +- LAYERS_SETUP_NOTHING = 0, +- LAYERS_SETUP_SET, +- LAYERS_SETUP_FREE +-}; +- +-union plane_cfg_internal_flags { +- struct { +- uint32_t PLANE_OWNS_CRTC:1; +- uint32_t RESERVED:31; +- } bits; +- uint32_t value; +-}; +- +- +-struct plane_cfg_internal { +- const struct plane_config *config; +- enum layers_setup setup; +- union plane_cfg_internal_flags flags; +-}; +- +-enum lock_type { +- LOCK_TYPE_GRPH = 0, +- LOCK_TYPE_SURF, +- LOCK_TYPE_SCL, +- LOCK_TYPE_BLND, +- /* lock the given pipe with options above */ +- LOCK_TYPE_THIS +-}; +- +-enum alpha_mode { +- ALPHA_MODE_PIXEL = 0, +- ALPHA_MODE_PIXEL_AND_GLOBAL = 1, +- ALPHA_MODE_GLOBAL = 2 +-}; +- +-union alpha_mode_cfg_flag { +- struct { +- uint32_t MODE_IS_SET:1; +- uint32_t MODE_MULTIPLIED_IS_SET:1; +- uint32_t GLOBAL_ALPHA_IS_SET:1; +- uint32_t GLOBAL_ALPHA_GAIN_IS_SET:1; +- +- uint32_t MULTIPLIED_MODE:1; +- uint32_t GLOBAL_ALPHA:8; +- /* total 21 bits! */ +- uint32_t GLOBAL_ALPHA_GAIN:8; +- } bits; +- uint32_t value; +-}; +- +-struct alpha_mode_cfg { +- union alpha_mode_cfg_flag flags; +- enum alpha_mode mode; +-}; +- +-union pending_cfg_changes { +- struct { +- uint32_t SCL_UNLOCK_REQUIRED:1; +- uint32_t BLND_UNLOCK_REQUIRED:1; +- uint32_t INPUT_CSC_SWITCH_REQUIRED:1; +- uint32_t OUTPUT_CSC_SWITCH_REQUIRED:1; +- } bits; +- uint32_t value; +-}; +- +-struct pending_plane_changes { +- union pending_cfg_changes changes; +- struct plane_id id; +-}; +- +- +-#endif /* __DAL_ISR_TYPES_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/include/mode_manager_types.h b/drivers/gpu/drm/amd/dal/include/mode_manager_types.h +deleted file mode 100644 +index 576b21f..0000000 +--- a/drivers/gpu/drm/amd/dal/include/mode_manager_types.h ++++ /dev/null +@@ -1,71 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_MODE_MANAGER_TYPES_H__ +-#define __DAL_MODE_MANAGER_TYPES_H__ +- +-#include "bit_set.h" +-#include "dc_types.h" +- +-static inline void stereo_3d_view_reset(struct stereo_3d_view *stereo_3d_view) +-{ +- stereo_3d_view->view_3d_format = VIEW_3D_FORMAT_NONE; +- stereo_3d_view->flags.raw = 0; +-} +- +-bool dal_refresh_rate_is_equal( +- const struct refresh_rate *lhs, +- const struct refresh_rate *rhs); +- +-bool dal_refresh_rate_less_than( +- const struct refresh_rate *lhs, +- const struct refresh_rate *rhs); +- +-void refresh_rate_from_mode_info( +- struct refresh_rate *, +- const struct dc_mode_info *); +-bool dal_solution_less_than(const void *lhs, const void *rhs); +-bool dal_view_is_equal(const struct view *lhs, const struct view *rhs); +- +-struct pixel_format_list { +- uint32_t set; +- struct bit_set_iterator_32 iter; +-}; +- +-void dal_pixel_format_list_reset_iterator(struct pixel_format_list *pfl); +-void dal_pixel_format_list_zero_iterator(struct pixel_format_list *pfl); +- +-void dal_pixel_format_list_construct( +- struct pixel_format_list *pfl, +- uint32_t mask); +- +-uint32_t dal_pixel_format_list_next(struct pixel_format_list *pfl); +- +-uint32_t dal_pixel_format_list_get_count( +- const struct pixel_format_list *pfl); +-enum pixel_format dal_pixel_format_list_get_pixel_format( +- const struct pixel_format_list *pfl); +- +-#endif /* __DAL_MODE_MANAGER_TYPES_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/include/mode_query_interface.h b/drivers/gpu/drm/amd/dal/include/mode_query_interface.h +deleted file mode 100644 +index 1d20e73..0000000 +--- a/drivers/gpu/drm/amd/dal/include/mode_query_interface.h ++++ /dev/null +@@ -1,93 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_MODE_QUERY_INTERFACE_H__ +-#define __DAL_MODE_QUERY_INTERFACE_H__ +- +-#include "include/set_mode_types.h" +-#include "include/mode_manager_types.h" +- +-enum query_option { +- QUERY_OPTION_ALLOW_PAN, +- QUERY_OPTION_ALLOW_PAN_NO_VIEW_RESTRICTION, +- QUERY_OPTION_PAN_ON_LIMITED_RESOLUTION_DISP_PATH, +- QUERY_OPTION_NO_PAN, +- QUERY_OPTION_NO_PAN_NO_DISPLAY_VIEW_RESTRICTION, +- QUERY_OPTION_3D_LIMITED_CANDIDATES, +- QUERY_OPTION_TILED_DISPLAY_PREFERRED, +- QUERY_OPTION_MAX, +-}; +- +-struct topology { +- uint32_t disp_path_num; +- uint32_t display_index[MAX_COFUNC_PATH]; +-}; +- +-struct path_mode; +-struct mode_query; +- +-bool dal_mode_query_pin_path_mode( +- struct mode_query *mq, +- const struct path_mode *path_mode); +- +-const struct render_mode *dal_mode_query_get_current_render_mode( +- const struct mode_query *mq); +- +-const struct stereo_3d_view *dal_mode_query_get_current_3d_view( +- const struct mode_query *mq); +- +-const struct refresh_rate *dal_mode_query_get_current_refresh_rate( +- const struct mode_query *mq); +- +-const struct path_mode_set *dal_mode_query_get_current_path_mode_set( +- const struct mode_query *mq); +- +-bool dal_mode_query_select_first(struct mode_query *mq); +-bool dal_mode_query_select_next_render_mode(struct mode_query *mq); +- +-bool dal_mode_query_select_render_mode(struct mode_query *mq, +- const struct render_mode *render_mode); +- +-bool dal_mode_query_select_next_view_3d_format(struct mode_query *mq); +-bool dal_mode_query_select_view_3d_format( +- struct mode_query *mq, +- enum view_3d_format format); +- +-bool dal_mode_query_select_refresh_rate(struct mode_query *mq, +- const struct refresh_rate *refresh_rate); +- +-bool dal_mode_query_select_refresh_rate_ex(struct mode_query *mq, +- uint32_t refresh_rate, +- bool interlaced); +- +-bool dal_mode_query_select_next_scaling(struct mode_query *mq); +- +-bool dal_mode_query_select_next_refresh_rate(struct mode_query *mq); +- +-bool dal_mode_query_base_select_next_scaling(struct mode_query *mq); +- +-void dal_mode_query_destroy(struct mode_query **mq); +- +-#endif /* __DAL_MODE_QUERY_INTERFACE_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/include/mode_timing_list_interface.h b/drivers/gpu/drm/amd/dal/include/mode_timing_list_interface.h +deleted file mode 100644 +index a558fec..0000000 +--- a/drivers/gpu/drm/amd/dal/include/mode_timing_list_interface.h ++++ /dev/null +@@ -1,51 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_MODE_TIMING_LIST_INTERFACE_H__ +-#define __DAL_MODE_TIMING_LIST_INTERFACE_H__ +- +- +-struct mode_timing_filter; +-struct mode_timing_list; +- +-struct mode_timing_list *dal_mode_timing_list_create( +- struct dal_context *ctx, +- uint32_t display_index, +- const struct mode_timing_filter *mt_filter); +- +-void dal_mode_timing_list_destroy(struct mode_timing_list **mtl); +- +- +-uint32_t dal_mode_timing_list_get_count( +- const struct mode_timing_list *mode_timing_list); +- +-const struct dc_mode_timing *dal_mode_timing_list_get_timing_at_index( +- const struct mode_timing_list *mode_timing_list, +- uint32_t index); +- +-const struct dc_mode_timing *dal_mode_timing_list_get_single_selected_mode_timing( +- const struct mode_timing_list *mode_timing_list); +- +-#endif /*__DAL_MODE_TIMING_LIST_INTERFACE_H__*/ +diff --git a/drivers/gpu/drm/amd/dal/include/overlay_interface.h b/drivers/gpu/drm/amd/dal/include/overlay_interface.h +deleted file mode 100644 +index c33bd73..0000000 +--- a/drivers/gpu/drm/amd/dal/include/overlay_interface.h ++++ /dev/null +@@ -1,137 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_OVERLAY_INTERFACE_H__ +-#define __DAL_OVERLAY_INTERFACE_H__ +- +-#include "include/overlay_types.h" +-#include "include/display_service_types.h" +- +-struct ds_overlay; +-struct path_mode_set; +-struct path_mode; +-struct view; +- +-bool dal_ds_overlay_is_active( +- struct ds_overlay *ovl, +- uint32_t display_index); +- +-uint32_t dal_ds_overlay_get_controller_handle( +- struct ds_overlay *ovl, +- uint32_t display_index); +- +-enum ds_return dal_ds_overlay_alloc( +- struct ds_overlay *ovl, +- struct path_mode_set *path_mode_set, +- uint32_t display_index, +- struct view *view, +- struct overlay_data *data); +- +-enum ds_return dal_ds_overlay_validate( +- struct ds_overlay *ovl, +- struct path_mode_set *path_mode_set, +- uint32_t display_index, +- struct view *view, +- struct overlay_data *data); +- +-enum ds_return dal_ds_overlay_free( +- struct ds_overlay *ovl, +- struct path_mode_set *path_mode_set, +- uint32_t display_index); +- +-enum ds_return dal_ds_overlay_get_info( +- struct ds_overlay *ovl, +- uint32_t display_index, +- enum overlay_color_space *color_space, +- enum overlay_backend_bpp *backend_bpp, +- enum overlay_alloc_option *alloc_option, +- enum overlay_format *surface_format); +- +-enum ds_return dal_ds_overlay_set_otm( +- struct ds_overlay *ovl, +- uint32_t display_index, +- const struct path_mode *current_path_mode); +- +-enum ds_return dal_ds_overlay_reset_otm( +- struct ds_overlay *ovl, +- uint32_t display_index, +- struct path_mode **saved_path_mode); +- +-/**is in overlay theater mode*/ +-bool dal_ds_overlay_is_in_otm( +- struct ds_overlay *ovl, +- uint32_t display_index); +- +-void dal_ds_overlay_set_matrix( +- struct ds_overlay *ovl, +- uint32_t display_index, +- const struct overlay_color_matrix *matrix); +- +-void dal_ds_overlay_reset_matrix( +- struct ds_overlay *ovl, +- uint32_t display_index, +- enum overlay_csc_matrix_type type); +- +-const struct overlay_color_matrix *dal_ds_overlay_get_matrix( +- struct ds_overlay *ovl, +- uint32_t display_index, +- enum overlay_csc_matrix_type type); +- +-bool dal_ds_overlay_set_color_space( +- struct ds_overlay *ovl, +- uint32_t display_index, +- enum overlay_color_space space); +- +-bool dal_ds_overlay_get_display_pixel_encoding( +- struct ds_overlay *ovl, +- uint32_t display_index, +- enum display_pixel_encoding *pixel_encoding); +- +-bool dal_ds_overlay_set_display_pixel_encoding( +- struct ds_overlay *ovl, +- uint32_t display_index, +- enum display_pixel_encoding pixel_encoding); +- +-bool dal_ds_overlay_reset_display_pixel_encoding( +- struct ds_overlay *ovl, +- uint32_t display_index); +- +-/*After Set Overlay Theatre Mode (OTM) on a display path, +- * saving the passed setting of Gpu scaling option for later restore*/ +-enum ds_return dal_ds_overlay_save_gpu_scaling_before_otm( +- struct ds_overlay *ovl, +- uint32_t display_index, +- int32_t timing_sel_before_otm); +- +-/* After reset Overlay Theatre Mode (OTM) on a display path, +- * returning the previous Gpu scaling option by SetOverlayTheatreMode*/ +-enum ds_return dal_ds_overlay_get_gpu_scaling_before_otm( +- struct ds_overlay *ovl, +- uint32_t display_index, +- int32_t *timing_sel_before_otm); +- +-uint32_t dal_ds_overlay_get_num_of_allowed(struct ds_overlay *ovl); +- +-#endif /* __DAL_OVERLAY_INTERFACE_H__ */ +diff --git a/drivers/gpu/drm/amd/dal/include/overlay_types.h b/drivers/gpu/drm/amd/dal/include/overlay_types.h +deleted file mode 100644 +index c001edf..0000000 +--- a/drivers/gpu/drm/amd/dal/include/overlay_types.h ++++ /dev/null +@@ -1,164 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_OVERLAY_TYPES_H__ +-#define __DAL_OVERLAY_TYPES_H__ +- +-enum overlay_color_space { +- OVERLAY_COLOR_SPACE_UNINITIALIZED, +- OVERLAY_COLOR_SPACE_RGB, /* the first*/ +- OVERLAY_COLOR_SPACE_BT601, +- OVERLAY_COLOR_SPACE_BT709, /* the last*/ +- OVERLAY_COLOR_SPACE_INVALID, +- +- /* flag the first and last*/ +- OVERLAY_COLOR_SPACE_BEGIN = OVERLAY_COLOR_SPACE_RGB, +- OVERLAY_COLOR_SPACE_END = OVERLAY_COLOR_SPACE_BT709, +-}; +- +-enum overlay_backend_bpp { +- OVERLAY_BACKENDBPP_UNINITIALIZED, +- +- OVERLAY_BACKEND_BPP_32_FULL_BANDWIDTH,/* the first*/ +- OVERLAY_BACKEND_BPP_16_FULL_BANDWIDTH, +- OVERLAY_BACKEND_BPP_32_HALF_BANDWIDTH,/* the last*/ +- +- OVERLAY_BACKEND_BPP_INVALID, +- +- /* flag the first and last*/ +- OVERLAY_BACKEND_BPP_BEGIN = OVERLAY_BACKEND_BPP_32_FULL_BANDWIDTH, +- OVERLAY_BACKEND_BPP_END = OVERLAY_BACKEND_BPP_32_HALF_BANDWIDTH, +-}; +- +-enum overlay_alloc_option { +- OVERLAY_ALLOC_OPTION_UNINITIALIZED, +- +- OVERLAY_ALLOC_OPTION_APPLY_OVERLAY_CSC, /* the first*/ +- OVERLAY_ALLOC_OPTION_APPLY_DESKTOP_CSC, /* the last*/ +- +- OVERLAY_ALLOC_OPTION_INVALID, +- +- /* flag the first and last*/ +- OVERLAY_ALLOC_OPTION_BEGIN = OVERLAY_ALLOC_OPTION_APPLY_OVERLAY_CSC, +- OVERLAY_ALLOC_OPTION_END = OVERLAY_ALLOC_OPTION_APPLY_DESKTOP_CSC, +-}; +- +-enum overlay_format { +- OVERLAY_FORMAT_UNINITIALIZED, +- OVERLAY_FORMAT_YUY2, +- OVERLAY_FORMAT_UYVY, +- OVERLAY_FORMAT_RGB565, +- OVERLAY_FORMAT_RGB555, +- OVERLAY_FORMAT_RGB32, +- OVERLAY_FORMAT_YUV444, +- OVERLAY_FORMAT_RGB32_2101010, +- +- OVERLAY_FORMAT_INVALID, +- +- /* flag the first and last*/ +- OVERLAY_FORMAT_BEGIN = OVERLAY_FORMAT_YUY2, +- OVERLAY_FORMAT_END = OVERLAY_FORMAT_RGB32_2101010, +-}; +- +-enum display_pixel_encoding { +- DISPLAY_PIXEL_ENCODING_UNDEFINED = 0, +- DISPLAY_PIXEL_ENCODING_RGB, +- DISPLAY_PIXEL_ENCODING_YCBCR422, +- DISPLAY_PIXEL_ENCODING_YCBCR444 +-}; +- +-union overlay_data_status { +- uint32_t u32all; +- struct { +- uint32_t COLOR_SPACE_SET:1; +- uint32_t BACKEND_BPP:1; +- uint32_t ALLOC_OPTION:1; +- uint32_t SURFACE_FORMAT:1; +- uint32_t PIXEL_ENCODING:1; +- uint32_t reserved:27; +- +- } bits; +-}; +- +-struct overlay_data { +- enum overlay_color_space color_space; +- enum overlay_backend_bpp backend_bpp; +- enum overlay_alloc_option alloc_option; +- enum overlay_format surface_format; +-}; +- +-enum overlay_csc_matrix_type { +- OVERLAY_CSC_MATRIX_NOTDEFINED = 0, +- OVERLAY_CSC_MATRIX_BT709, +- OVERLAY_CSC_MATRIX_BT601, +- OVERLAY_CSC_MATRIX_SMPTE240, +- OVERLAY_CSC_MATRIX_SRGB, +-}; +- +-#define DEFAULT_APP_MATRIX_DIVIDER 10000 +-#define MAX_OVL_MATRIX_COUNTS 2 +-#define OVL_BT709 0 +-#define OVL_BT601 1 +- +-#define OVL_MATRIX_ITEM 9 +-#define OVL_MATRIX_OFFSET_ITEM 3 +- +-struct overlay_color_matrix { +- enum overlay_csc_matrix_type csc_matrix; +-/*3*3 Gamut Matrix (value is the real value * M_GAMUT_PRECISION_MULTIPLIER)*/ +- int32_t matrix_settings[OVL_MATRIX_ITEM]; +- int32_t offsets[OVL_MATRIX_OFFSET_ITEM]; +-}; +- +-enum setup_adjustment_ovl_value_type { +- SETUP_ADJUSTMENT_MIN, +- SETUP_ADJUSTMENT_MAX, +- SETUP_ADJUSTMENT_DEF, +- SETUP_ADJUSTMENT_CURRENT, +- SETUP_ADJUSTMENT_BUNDLE_MIN, +- SETUP_ADJUSTMENT_BUNDLE_MAX, +- SETUP_ADJUSTMENT_BUNDLE_DEF, +- SETUP_ADJUSTMENT_BUNDLE_CURRENT +-}; +- +-struct overlay_parameter { +- union { +- uint32_t u32all; +- struct { +- uint32_t VALID_OVL_COLOR_SPACE:1; +- uint32_t VALID_VALUE_TYPE:1; +- uint32_t VALID_OVL_SURFACE_FORMAT:1; +- uint32_t CONFIG_IS_CHANGED:1; +- uint32_t reserved:28; +- +- } bits; +- }; +- /*currently colorSpace here packed, continue this list*/ +- enum overlay_color_space color_space; +- enum setup_adjustment_ovl_value_type value_type; +- enum overlay_format surface_format; +-}; +- +-#endif /* OVERLAY_TYPES_H_ */ +diff --git a/drivers/gpu/drm/amd/dal/include/path_mode_set_interface.h b/drivers/gpu/drm/amd/dal/include/path_mode_set_interface.h +deleted file mode 100644 +index a277010..0000000 +--- a/drivers/gpu/drm/amd/dal/include/path_mode_set_interface.h ++++ /dev/null +@@ -1,107 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_PATH_MODE_SET_INTERFACE_H__ +-#define __DAL_PATH_MODE_SET_INTERFACE_H__ +- +-/* Set of path modes */ +-struct path_mode_set { +- union control_flags { +- struct { +- uint32_t KEEP_DISPLAY_POWERED_OFF:1; +- uint32_t UNBLANCK_SOURCE_AFTER_SETMODE:1; +- uint32_t NODE_FAULT_UNDERSCAN:1; +- } bits; +- +- uint32_t all; +- } control_flags; +- +- struct path_mode path_mode_set[MAX_COFUNC_PATH]; +- uint32_t count; +-}; +- +-/* Create path mode set */ +-struct path_mode_set *dal_pms_create(void); +- +-/* Deallocate path mode set */ +-void dal_pms_destroy( +- struct path_mode_set **pms); +- +-/* Create a copy of given path mode set */ +-struct path_mode_set *dal_pms_copy( +- const struct path_mode_set *copy); +- +-/* Constructor for path mode set */ +-bool dal_pms_construct( +- struct path_mode_set *set); +- +-/* Add a path mode into the set */ +-bool dal_pms_add_path_mode( +- struct path_mode_set *set, +- const struct path_mode *path_mode); +- +-/* Get number of path modes in the set */ +-uint32_t dal_pms_get_path_mode_num( +- const struct path_mode_set *set); +- +-/* Return the path mode at the index */ +-const struct path_mode *dal_pms_get_path_mode_at_index( +- const struct path_mode_set *set, +- uint32_t index); +- +-/* Return the path mode for the given display index */ +-const struct path_mode *dal_pms_get_path_mode_for_display_index( +- const struct path_mode_set *set, +- uint32_t index); +- +-/* Remove the path mode at index */ +-bool dal_pms_remove_path_mode_at_index( +- struct path_mode_set *set, +- uint32_t index); +- +-/* Remove the given path mode if it is found in the set */ +-bool dal_pms_remove_path_mode( +- struct path_mode_set *set, +- struct path_mode *mode); +- +-/* Add control flag to keep display powered off */ +-void dal_pms_keep_display_powered_off( +- struct path_mode_set *set, +- bool keep); +- +-/* Return control flag if display needs to be kept powered off */ +-bool dal_pms_is_display_power_off_required( +- const struct path_mode_set *set); +- +-/* Add control flag to not use default underscan*/ +-void dal_pms_fallback_remove_default_underscan( +- struct path_mode_set *set, +- bool lean); +- +-/* Return control flag if default underscan is not used */ +-bool dal_pms_is_fallback_no_default_underscan_enabled( +- struct path_mode_set *set); +- +-#endif +diff --git a/drivers/gpu/drm/amd/dal/include/set_mode_params_interface.h b/drivers/gpu/drm/amd/dal/include/set_mode_params_interface.h +deleted file mode 100644 +index e4f52c4..0000000 +--- a/drivers/gpu/drm/amd/dal/include/set_mode_params_interface.h ++++ /dev/null +@@ -1,101 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_SET_MODE_PARAMS_INTERFACE_H__ +-#define __DAL_SET_MODE_PARAMS_INTERFACE_H__ +- +-struct set_mode_params; +- +-struct set_mode_params_init_data { +- struct hw_sequencer *hws; +- struct dal_context *ctx; +- struct topology_mgr *tm; +-}; +- +-struct view_stereo_3d_support dal_set_mode_params_get_stereo_3d_support( +- struct set_mode_params *smp, +- uint32_t display_index, +- enum dc_timing_3d_format); +- +-bool dal_set_mode_params_update_view_on_path( +- struct set_mode_params *smp, +- uint32_t display_index, +- const struct view *vw); +- +-bool dal_set_mode_params_update_mode_timing_on_path( +- struct set_mode_params *smp, +- uint32_t display_index, +- const struct dc_mode_timing *mode_timing, +- enum view_3d_format format); +- +-bool dal_set_mode_params_update_scaling_on_path( +- struct set_mode_params *smp, +- uint32_t display_index, +- enum scaling_transformation st); +- +-bool dal_set_mode_params_update_pixel_format_on_path( +- struct set_mode_params *smp, +- uint32_t display_index, +- enum pixel_format pf); +- +-bool dal_set_mode_params_update_tiling_mode_on_path( +- struct set_mode_params *smp, +- uint32_t display_index, +- enum tiling_mode tm); +- +-bool dal_set_mode_params_is_path_mode_set_supported( +- struct set_mode_params *smp); +- +-bool dal_set_mode_params_is_path_mode_set_guaranteed( +- struct set_mode_params *smp); +- +-bool dal_set_mode_params_report_single_selected_timing( +- struct set_mode_params *smp, +- uint32_t display_index); +- +-bool dal_set_mode_params_report_ce_mode_only( +- struct set_mode_params *smp, +- uint32_t display_index); +- +-struct set_mode_params *dal_set_mode_params_create( +- struct set_mode_params_init_data *init_data); +- +-bool dal_set_mode_params_init_with_topology( +- struct set_mode_params *smp, +- const uint32_t display_indicies[], +- uint32_t idx_num); +- +-bool dal_set_mode_params_is_multiple_pixel_encoding_supported( +- struct set_mode_params *smp, +- uint32_t display_index); +- +-enum dc_pixel_encoding dal_set_mode_params_get_default_pixel_format_preference( +- struct set_mode_params *smp, +- unsigned int display_index); +- +-void dal_set_mode_params_destroy( +- struct set_mode_params **set_mode_params); +- +-#endif +diff --git a/drivers/gpu/drm/amd/dal/include/timing_list_query_interface.h b/drivers/gpu/drm/amd/dal/include/timing_list_query_interface.h +deleted file mode 100644 +index 16e3521..0000000 +--- a/drivers/gpu/drm/amd/dal/include/timing_list_query_interface.h ++++ /dev/null +@@ -1,69 +0,0 @@ +-/* +- * Copyright 2012-15 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- * Authors: AMD +- * +- */ +- +-#ifndef __DAL_TIMING_LIST_QUERY_INTERFACE_H__ +-#define __DAL_TIMING_LIST_QUERY_INTERFACE_H__ +- +-/* External dependencies */ +-#include "include/dcs_interface.h" +- +-/* Forward declarations */ +-struct dal; +-struct dal_timing_list_query; +- +-enum timing_support_level { +- TIMING_SUPPORT_LEVEL_UNDEFINED, +- /* assumed to be guaranteed supported by display, +- * usually one timing is marked as native */ +- TIMING_SUPPORT_LEVEL_NATIVE, +- /* user wants DAL to drive this timing as if Display supports it */ +- TIMING_SUPPORT_LEVEL_GUARANTEED, +- /* user wants DAL to drive this timing even if display +- * may not support it */ +- TIMING_SUPPORT_LEVEL_NOT_GUARANTEED +-}; +- +-struct timing_list_query_init_data { +- struct dal *dal; /* an instance of DAL */ +- struct timing_service *timing_srv; +- struct dcs *dcs; +- uint32_t display_index; +-}; +- +-struct dal_timing_list_query *dal_timing_list_query_create( +- struct timing_list_query_init_data *init_data); +- +-void dal_timing_list_query_destroy(struct dal_timing_list_query **tlsq); +- +-/* Get count of mode timings in the list. */ +-uint32_t dal_timing_list_query_get_mode_timing_count( +- const struct dal_timing_list_query *tlsq); +- +-const struct dc_mode_timing *dal_timing_list_query_get_mode_timing_at_index( +- const struct dal_timing_list_query *tlsq, +- uint32_t index); +- +- +-#endif /* __DAL_TIMING_LIST_QUERY_INTERFACE_H__ */ +-- +2.7.4 + |