1 files changed, 0 insertions, 67 deletions
diff --git a/common/recipes-kernel/linux/files/0631-drm-amdgpu-add-DCE-support-for-Stoney.patch b/common/recipes-kernel/linux/files/0631-drm-amdgpu-add-DCE-support-for-Stoney.patch
deleted file mode 100644
index 8e9f74a5..00000000
--- a/common/recipes-kernel/linux/files/0631-drm-amdgpu-add-DCE-support-for-Stoney.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From fa2f9befbbbe239bbc6aa1dc6284841a8bd15d49 Mon Sep 17 00:00:00 2001
-From: Samuel Li <samuel.li@amd.com>
-Date: Thu, 8 Oct 2015 16:29:06 -0400
-Subject: [PATCH 0631/1565] drm/amdgpu: add DCE support for Stoney
-
-Stoney is DCE 11.x.
-
-Signed-off-by: Samuel Li <samuel.li@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
----
- drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 19 ++++++++++++++++++-
- 1 file changed, 18 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
-index bdafeb2..444d930 100644
---- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
-+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
-@@ -126,6 +126,13 @@ static const u32 cz_mgcg_cgcg_init[] =
- 	mmXDMA_MEM_POWER_CNTL, 0x00000101, 0x00000000,
- };
- 
-+static const u32 stoney_golden_settings_a11[] =
-+{
-+	mmCRTC_DOUBLE_BUFFER_CONTROL, 0x00010101, 0x00010000,
-+	mmFBC_MISC, 0x1f311fff, 0x14302000,
-+};
-+
-+
- static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev)
- {
- 	switch (adev->asic_type) {
-@@ -137,6 +144,11 @@ static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev)
- 						 cz_golden_settings_a11,
- 						 (const u32)ARRAY_SIZE(cz_golden_settings_a11));
- 		break;
-+	case CHIP_STONEY:
-+		amdgpu_program_register_sequence(adev,
-+						 stoney_golden_settings_a11,
-+						 (const u32)ARRAY_SIZE(stoney_golden_settings_a11));
-+		break;
- 	default:
- 		break;
- 	}
-@@ -2425,7 +2437,7 @@ static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc)
- 
- 	/* XXX need to determine what plls are available on each DCE11 part */
- 	pll_in_use = amdgpu_pll_get_use_mask(crtc);
--	if (adev->asic_type == CHIP_CARRIZO) {
-+	if (adev->asic_type == CHIP_CARRIZO || adev->asic_type == CHIP_STONEY) {
- 		if (!(pll_in_use & (1 << ATOM_PPLL1)))
- 			return ATOM_PPLL1;
- 		if (!(pll_in_use & (1 << ATOM_PPLL0)))
-@@ -2930,6 +2942,11 @@ static int dce_v11_0_early_init(void *handle)
- 		adev->mode_info.num_hpd = 6;
- 		adev->mode_info.num_dig = 9;
- 		break;
-+	case CHIP_STONEY:
-+		adev->mode_info.num_crtc = 2;
-+		adev->mode_info.num_hpd = 6;
-+		adev->mode_info.num_dig = 9;
-+		break;
- 	default:
- 		/* FIXME: not supported yet */
- 		return -EINVAL;
--- 
-1.9.1
-