diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0623-drm-amd-dal-Unblanking-logic-change-in-DM-DC.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0623-drm-amd-dal-Unblanking-logic-change-in-DM-DC.patch | 135 |
1 files changed, 135 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0623-drm-amd-dal-Unblanking-logic-change-in-DM-DC.patch b/common/recipes-kernel/linux/files/0623-drm-amd-dal-Unblanking-logic-change-in-DM-DC.patch new file mode 100644 index 00000000..d05c9d44 --- /dev/null +++ b/common/recipes-kernel/linux/files/0623-drm-amd-dal-Unblanking-logic-change-in-DM-DC.patch @@ -0,0 +1,135 @@ +From 56f1ac8be4cdb4f124348e34d9838fc3df9b5ccf Mon Sep 17 00:00:00 2001 +From: Jun Lei <Jun.Lei@amd.com> +Date: Tue, 15 Dec 2015 18:08:17 -0500 +Subject: [PATCH 0623/1110] drm/amd/dal: Unblanking logic change in DM/DC + +DC should unblank and blank displays in commit_surfaces based on *enabled* +surfaces rather than just surface count. + +Signed-off-by: Jun Lei <Jun.Lei@amd.com> +Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> +--- + .../gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c | 2 +- + drivers/gpu/drm/amd/dal/dc/core/dc_target.c | 36 ++++++++++++++-------- + drivers/gpu/drm/amd/dal/dc/dc.h | 2 +- + 3 files changed, 25 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c +index 465d9bf..516d321 100644 +--- a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c ++++ b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c +@@ -492,7 +492,7 @@ static void fill_plane_attributes_from_fb( + surface->plane_size.grph.surface_pitch = + fb->pitches[0] / (fb->bits_per_pixel / 8); + +- surface->enabled = true; ++ surface->visible = true; + surface->scaling_quality.h_taps_c = 2; + surface->scaling_quality.v_taps_c = 2; + +diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_target.c b/drivers/gpu/drm/amd/dal/dc/core/dc_target.c +index 9ae98c5..82cdae1 100644 +--- a/drivers/gpu/drm/amd/dal/dc/core/dc_target.c ++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_target.c +@@ -194,36 +194,46 @@ gamma_param_fail: + + bool dc_commit_surfaces_to_target( + struct dc *dc, +- struct dc_surface *surfaces[], +- uint8_t surface_count, ++ struct dc_surface *new_surfaces[], ++ uint8_t new_surface_count, + struct dc_target *dc_target) + + { + uint8_t i, j; + struct core_target *target = DC_TARGET_TO_CORE(dc_target); +- bool need_blanking = (target->status.surface_count == 0); ++ ++ bool current_enabled_surface_count = 0; ++ bool new_enabled_surface_count = 0; ++ ++ for (i = 0; i < target->status.surface_count; i++) ++ if (target->status.surfaces[i]->visible) ++ current_enabled_surface_count++; ++ ++ for (i = 0; i < new_surface_count; i++) ++ if (new_surfaces[i]->visible) ++ new_enabled_surface_count++; + + dal_logger_write(dc->ctx->logger, + LOG_MAJOR_INTERFACE_TRACE, + LOG_MINOR_COMPONENT_DC, + "%s: commit %d surfaces to target 0x%x", + __func__, +- surface_count, ++ new_surface_count, + dc_target); + + + if (!logical_attach_surfaces_to_target( +- surfaces, +- surface_count, ++ new_surfaces, ++ new_surface_count, + dc_target)) { + BREAK_TO_DEBUGGER(); + goto unexpected_fail; + } + +- for (i = 0; i < surface_count; i++) ++ for (i = 0; i < new_surface_count; i++) + for (j = 0; j < target->public.stream_count; j++) + build_scaling_params( +- surfaces[i], ++ new_surfaces[i], + DC_STREAM_TO_CORE(target->public.streams[j])); + + if (dc->hwss.validate_bandwidth(dc, &dc->current_context) != DC_OK) { +@@ -233,11 +243,11 @@ bool dc_commit_surfaces_to_target( + + dc->hwss.program_bw(dc, &dc->current_context); + +- if (need_blanking) ++ if (current_enabled_surface_count > 0 && new_enabled_surface_count == 0) + dc_target_disable_memory_requests(dc_target); + +- for (i = 0; i < surface_count; i++) { +- struct dc_surface *surface = surfaces[i]; ++ for (i = 0; i < new_surface_count; i++) { ++ struct dc_surface *surface = new_surfaces[i]; + struct core_surface *core_surface = DC_SURFACE_TO_CORE(surface); + + dal_logger_write(dc->ctx->logger, +@@ -258,13 +268,13 @@ bool dc_commit_surfaces_to_target( + dc->hwss.update_plane_address(core_surface, target); + } + +- if (surface_count > 0 && need_blanking) ++ if (current_enabled_surface_count == 0 && new_enabled_surface_count > 0) + dc_target_enable_memory_requests(dc_target); + + return true; + + unexpected_fail: +- for (i = 0; i < surface_count; i++) { ++ for (i = 0; i < new_surface_count; i++) { + target->status.surfaces[i] = NULL; + } + target->status.surface_count = 0; +diff --git a/drivers/gpu/drm/amd/dal/dc/dc.h b/drivers/gpu/drm/amd/dal/dc/dc.h +index bbeaf23..264b428 100644 +--- a/drivers/gpu/drm/amd/dal/dc/dc.h ++++ b/drivers/gpu/drm/amd/dal/dc/dc.h +@@ -58,7 +58,7 @@ void dc_destroy(struct dc **dc); + ******************************************************************************/ + + struct dc_surface { +- bool enabled; ++ bool visible; + bool flip_immediate; + struct dc_plane_address address; + +-- +2.7.4 + |