diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0600-drm-amd-dal-Prepare-DP-support-for-next-ASIC-generat.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0600-drm-amd-dal-Prepare-DP-support-for-next-ASIC-generat.patch | 197 |
1 files changed, 197 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0600-drm-amd-dal-Prepare-DP-support-for-next-ASIC-generat.patch b/common/recipes-kernel/linux/files/0600-drm-amd-dal-Prepare-DP-support-for-next-ASIC-generat.patch new file mode 100644 index 00000000..dff3b960 --- /dev/null +++ b/common/recipes-kernel/linux/files/0600-drm-amd-dal-Prepare-DP-support-for-next-ASIC-generat.patch @@ -0,0 +1,197 @@ +From 8a73138524b386d7bd3183004fbf86c91a43328c Mon Sep 17 00:00:00 2001 +From: Jun Lei <Jun.Lei@amd.com> +Date: Tue, 8 Dec 2015 17:48:05 -0500 +Subject: [PATCH 0600/1110] drm/amd/dal: Prepare DP support for next ASIC + generation + +1.) Fix link encoder not properly initializing HPD for AUX +2.) Fix V6 atombios HPD src incorrectly shifted by 4 bits +3.) Fixed connector object ID mismatch +4.) Fixed PLL clock source programming incorrectly multiplying pixel clock by 100 +5.) Fixed calling VBIOS pixel clock programming being called with clock off by factor of 10 + +Signed-off-by: Harry Wentland <harry.wentland@amd.com> +Acked-by: Harry Wentland<harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/dal/dc/bios/command_table.c | 2 +- + .../drm/amd/dal/dc/connector/connector_signals.c | 38 ++++++++++++++++++++-- + drivers/gpu/drm/amd/dal/dc/gpu/clock_source.h | 1 + + .../dal/dc/gpu/dce110/ext_clock_source_dce110.c | 2 +- + .../drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c | 4 +++ + drivers/gpu/drm/amd/dal/include/grph_object_id.h | 30 ++++++++--------- + 6 files changed, 57 insertions(+), 20 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/dc/bios/command_table.c b/drivers/gpu/drm/amd/dal/dc/bios/command_table.c +index 8503eca..c686cc8 100644 +--- a/drivers/gpu/drm/amd/dal/dc/bios/command_table.c ++++ b/drivers/gpu/drm/amd/dal/dc/bios/command_table.c +@@ -1247,7 +1247,7 @@ static enum bp_result set_pixel_clock_v7( + clk.ucEncoderMode = (uint8_t) bp->cmd_helper->encoder_mode_bp_to_atom(bp_params->signal_type, false); + + /* We need to convert from KHz units into 10KHz units */ +- clk.ulPixelClock = cpu_to_le32(bp_params->target_pixel_clock / 10); ++ clk.ulPixelClock = cpu_to_le32(bp_params->target_pixel_clock * 10); + + clk.ucDeepColorRatio = (uint8_t) bp->cmd_helper->transmitter_color_depth_to_atom(bp_params->color_depth); + +diff --git a/drivers/gpu/drm/amd/dal/dc/connector/connector_signals.c b/drivers/gpu/drm/amd/dal/dc/connector/connector_signals.c +index d1a289d..3a5d75b 100644 +--- a/drivers/gpu/drm/amd/dal/dc/connector/connector_signals.c ++++ b/drivers/gpu/drm/amd/dal/dc/connector/connector_signals.c +@@ -165,14 +165,31 @@ const struct connector_signals default_signals[] = { + SIGNALS_ARRAY_ELEM(default_signals_single_link_dvid), + SIGNALS_ARRAY_ELEM(default_signals_dual_link_dvid), + SIGNALS_ARRAY_ELEM(default_signals_vga), ++ /* Composite */ ++ SIGNALS_ARRAY_ELEM(default_signals_none), ++ /* S Video */ ++ SIGNALS_ARRAY_ELEM(default_signals_none), ++ /* YPbPr */ ++ SIGNALS_ARRAY_ELEM(default_signals_none), ++ /* DConnector */ ++ SIGNALS_ARRAY_ELEM(default_signals_none), ++ /* 9pinDIN */ ++ SIGNALS_ARRAY_ELEM(default_signals_none), ++ /* SCART */ ++ SIGNALS_ARRAY_ELEM(default_signals_none), + SIGNALS_ARRAY_ELEM(default_signals_hdmi_type_a), ++ /* Not Used */ + SIGNALS_ARRAY_ELEM(default_signals_none), + SIGNALS_ARRAY_ELEM(default_signals_lvds), ++ /* 7pin DIN*/ ++ SIGNALS_ARRAY_ELEM(default_signals_none), + SIGNALS_ARRAY_ELEM(default_signals_pcie), ++ /* CrossFire */ ++ SIGNALS_ARRAY_ELEM(default_signals_none), + SIGNALS_ARRAY_ELEM(default_signals_hardcode_dvi), + SIGNALS_ARRAY_ELEM(default_signals_displayport), + SIGNALS_ARRAY_ELEM(default_signals_edp), +- /* MXM dummy connector */ ++ /* MXM*/ + SIGNALS_ARRAY_ELEM(default_signals_none), + SIGNALS_ARRAY_ELEM(default_signals_wireless), + SIGNALS_ARRAY_ELEM(default_signals_miracast) +@@ -188,14 +205,31 @@ const struct connector_signals supported_signals[] = { + SIGNALS_ARRAY_ELEM(signals_single_link_dvid), + SIGNALS_ARRAY_ELEM(signals_dual_link_dvid), + SIGNALS_ARRAY_ELEM(signals_vga), ++ /* Composite */ ++ SIGNALS_ARRAY_ELEM(signals_none), ++ /* S Video */ ++ SIGNALS_ARRAY_ELEM(signals_none), ++ /* YPbPr */ ++ SIGNALS_ARRAY_ELEM(signals_none), ++ /* DConnector */ ++ SIGNALS_ARRAY_ELEM(signals_none), ++ /* 9pinDIN */ ++ SIGNALS_ARRAY_ELEM(signals_none), ++ /* SCART */ ++ SIGNALS_ARRAY_ELEM(signals_none), + SIGNALS_ARRAY_ELEM(signals_hdmi_type_a), ++ /* Note Used */ + SIGNALS_ARRAY_ELEM(signals_none), + SIGNALS_ARRAY_ELEM(signals_lvds), ++ /* 7pin DIN*/ ++ SIGNALS_ARRAY_ELEM(signals_none), + SIGNALS_ARRAY_ELEM(signals_pcie), ++ /* CrossFire */ ++ SIGNALS_ARRAY_ELEM(signals_none), + SIGNALS_ARRAY_ELEM(signals_hardcode_dvi), + SIGNALS_ARRAY_ELEM(signals_displayport), + SIGNALS_ARRAY_ELEM(signals_edp), +- /* MXM dummy connector */ ++ /* MXM */ + SIGNALS_ARRAY_ELEM(signals_none), + SIGNALS_ARRAY_ELEM(signals_wireless), + SIGNALS_ARRAY_ELEM(signals_miracast) +diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/clock_source.h b/drivers/gpu/drm/amd/dal/dc/gpu/clock_source.h +index 0210f03..67ececd 100644 +--- a/drivers/gpu/drm/amd/dal/dc/gpu/clock_source.h ++++ b/drivers/gpu/drm/amd/dal/dc/gpu/clock_source.h +@@ -88,6 +88,7 @@ struct registers { + uint32_t dp_dtox_phase; + uint32_t dp_dtox_modulo; + uint32_t crtcx_pixel_rate_cntl; ++ uint32_t crtcx_phypll_pixel_rate_cntl; + uint32_t combophyx_pll_wrap_cntl; + uint32_t combophyx_freq_cntl0; + uint32_t combophyx_freq_cntl2; +diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/dce110/ext_clock_source_dce110.c b/drivers/gpu/drm/amd/dal/dc/gpu/dce110/ext_clock_source_dce110.c +index 7fd5984..80f7da7 100644 +--- a/drivers/gpu/drm/amd/dal/dc/gpu/dce110/ext_clock_source_dce110.c ++++ b/drivers/gpu/drm/amd/dal/dc/gpu/dce110/ext_clock_source_dce110.c +@@ -168,7 +168,7 @@ static bool adjust_dto_pixel_rate( + /** + * Retrieve Pixel Rate (in Hz) from HW registers already programmed. + */ +-uint32_t retrieve_dp_pixel_rate_from_display_pll( ++static uint32_t retrieve_dp_pixel_rate_from_display_pll( + struct clock_source *clk_src, + struct pixel_clk_params *params) + { +diff --git a/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c b/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c +index 3de8951..05f5778 100644 +--- a/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c ++++ b/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c +@@ -126,6 +126,8 @@ static const enum gpio_ddc_line hw_ddc_lines[] = { + GPIO_DDC_LINE_DDC2, + GPIO_DDC_LINE_DDC3, + GPIO_DDC_LINE_DDC4, ++ GPIO_DDC_LINE_DDC5, ++ GPIO_DDC_LINE_DDC6, + }; + + static const enum gpio_ddc_line hw_aux_lines[] = { +@@ -133,6 +135,8 @@ static const enum gpio_ddc_line hw_aux_lines[] = { + GPIO_DDC_LINE_DDC2, + GPIO_DDC_LINE_DDC3, + GPIO_DDC_LINE_DDC4, ++ GPIO_DDC_LINE_DDC5, ++ GPIO_DDC_LINE_DDC6, + }; + + /* function table */ +diff --git a/drivers/gpu/drm/amd/dal/include/grph_object_id.h b/drivers/gpu/drm/amd/dal/include/grph_object_id.h +index 5d69a34..1eafe7c 100644 +--- a/drivers/gpu/drm/amd/dal/include/grph_object_id.h ++++ b/drivers/gpu/drm/amd/dal/include/grph_object_id.h +@@ -168,22 +168,20 @@ enum encoder_id { + /* Connector object ids */ + enum connector_id { + CONNECTOR_ID_UNKNOWN = 0, +- CONNECTOR_ID_SINGLE_LINK_DVII, +- CONNECTOR_ID_DUAL_LINK_DVII, +- CONNECTOR_ID_SINGLE_LINK_DVID, +- CONNECTOR_ID_DUAL_LINK_DVID, +- CONNECTOR_ID_VGA, +- CONNECTOR_ID_HDMI_TYPE_A, +- CONNECTOR_ID_NOT_USED, +- CONNECTOR_ID_LVDS, +- CONNECTOR_ID_PCIE, +- CONNECTOR_ID_HARDCODE_DVI, +- CONNECTOR_ID_DISPLAY_PORT, +- CONNECTOR_ID_EDP, +- CONNECTOR_ID_MXM, +- CONNECTOR_ID_WIRELESS, /* wireless display pseudo-connector */ +- CONNECTOR_ID_MIRACAST, /* used for VCE encode display path +- * for Miracast */ ++ CONNECTOR_ID_SINGLE_LINK_DVII = 1, ++ CONNECTOR_ID_DUAL_LINK_DVII = 2, ++ CONNECTOR_ID_SINGLE_LINK_DVID = 3, ++ CONNECTOR_ID_DUAL_LINK_DVID = 4, ++ CONNECTOR_ID_VGA = 5, ++ CONNECTOR_ID_HDMI_TYPE_A = 12, ++ CONNECTOR_ID_LVDS = 14, ++ CONNECTOR_ID_PCIE = 16, ++ CONNECTOR_ID_HARDCODE_DVI = 18, ++ CONNECTOR_ID_DISPLAY_PORT = 19, ++ CONNECTOR_ID_EDP = 20, ++ CONNECTOR_ID_MXM = 21, ++ CONNECTOR_ID_WIRELESS = 22, ++ CONNECTOR_ID_MIRACAST = 23, + + CONNECTOR_ID_COUNT + }; +-- +2.7.4 + |