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-rw-r--r--common/recipes-kernel/linux/files/0555-drm-amd-dal-Simplify-return-value-for-HW-programming.patch469
1 files changed, 469 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0555-drm-amd-dal-Simplify-return-value-for-HW-programming.patch b/common/recipes-kernel/linux/files/0555-drm-amd-dal-Simplify-return-value-for-HW-programming.patch
new file mode 100644
index 00000000..c261c9f8
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0555-drm-amd-dal-Simplify-return-value-for-HW-programming.patch
@@ -0,0 +1,469 @@
+From e329df58f0107375dd3d19c4405113a25e884912 Mon Sep 17 00:00:00 2001
+From: Chris Park <Chris.Park@amd.com>
+Date: Tue, 1 Dec 2015 15:04:11 -0500
+Subject: [PATCH 0555/1110] drm/amd/dal: Simplify return value for HW
+ programming
+
+Only OK & ERROR used. Replace with bool.
+
+Signed-off-by: Chris Park <Chris.Park@amd.com>
+Signed-off-by: Harry Wentland <harry.wentland@amd.com>
+Acked-by: Harry Wentland <harry.wentland@amd.com>
+---
+ drivers/gpu/drm/amd/dal/dc/core/dc.c | 2 +-
+ drivers/gpu/drm/amd/dal/dc/core/dc_link.c | 8 +--
+ drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c | 4 +-
+ drivers/gpu/drm/amd/dal/dc/dc_types.h | 8 ---
+ .../drm/amd/dal/dc/dce110/dce110_link_encoder.c | 58 +++++++++++-----------
+ .../drm/amd/dal/dc/dce110/dce110_link_encoder.h | 18 +++----
+ .../gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 5 +-
+ drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h | 8 +--
+ 8 files changed, 51 insertions(+), 60 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc.c b/drivers/gpu/drm/amd/dal/dc/core/dc.c
+index 01e961a..14e10b9 100644
+--- a/drivers/gpu/drm/amd/dal/dc/core/dc.c
++++ b/drivers/gpu/drm/amd/dal/dc/core/dc.c
+@@ -162,7 +162,7 @@ static void init_hw(struct dc *dc)
+ * required signal (which may be different from the
+ * default signal on connector). */
+ struct core_link *link = dc->links[i];
+- if (dc->hwss.encoder_power_up(link->link_enc) != ENCODER_RESULT_OK) {
++ if (!dc->hwss.encoder_power_up(link->link_enc)) {
+ dal_error("Failed link encoder power up!\n");
+ return;
+ }
+diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c
+index f0719e9..58eac92 100644
+--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c
++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c
+@@ -977,14 +977,14 @@ static enum dc_status enable_link_hdmi(struct core_stream *stream)
+ (stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)
+ ? LANE_COUNT_EIGHT : LANE_COUNT_FOUR;
+
+- if (link->ctx->dc->hwss.encoder_enable_output(
++ if (!link->ctx->dc->hwss.encoder_enable_output(
+ stream->sink->link->link_enc,
+ &stream->sink->link->cur_link_settings,
+ stream->stream_enc->id,
+ dal_clock_source_get_id(stream->clock_source),
+ stream->signal,
+ stream->public.timing.display_color_depth,
+- stream->public.timing.pix_clk_khz) != ENCODER_RESULT_OK)
++ stream->public.timing.pix_clk_khz))
+ status = DC_ERROR_UNEXPECTED;
+
+ if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)
+@@ -1052,8 +1052,8 @@ enum dc_status core_link_disable(struct core_stream *stream)
+ }
+ }
+
+- else if (ENCODER_RESULT_OK != dc->hwss.encoder_disable_output(
+- stream->sink->link->link_enc, stream->signal))
++ else if (!dc->hwss.encoder_disable_output(
++ stream->sink->link->link_enc, stream->signal))
+ status = DC_ERROR_UNEXPECTED;
+
+ return status;
+diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c
+index 7961a4e..054b0a3 100644
+--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c
++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c
+@@ -54,14 +54,14 @@ enum dc_status dp_enable_link_phy(
+ {
+ enum dc_status status = DC_OK;
+
+- if (link->dc->hwss.encoder_enable_output(
++ if (!link->dc->hwss.encoder_enable_output(
+ link->link_enc,
+ link_settings,
+ engine,
+ CLOCK_SOURCE_ID_EXTERNAL,
+ signal,
+ COLOR_DEPTH_UNDEFINED,
+- 0) != ENCODER_RESULT_OK)
++ 0))
+ status = DC_ERROR_UNEXPECTED;
+
+ if (status == DC_OK)
+diff --git a/drivers/gpu/drm/amd/dal/dc/dc_types.h b/drivers/gpu/drm/amd/dal/dc/dc_types.h
+index db7608e..b6526e9 100644
+--- a/drivers/gpu/drm/amd/dal/dc/dc_types.h
++++ b/drivers/gpu/drm/amd/dal/dc/dc_types.h
+@@ -672,14 +672,6 @@ struct dc_csc_adjustments {
+ struct fixed31_32 hue;
+ };
+
+-enum dc_encoder_result {
+- ENCODER_RESULT_OK,
+- ENCODER_RESULT_ERROR,
+- ENCODER_RESULT_NOBANDWIDTH,
+- ENCODER_RESULT_SINKCONNECTIVITYCHANGED
+-#endif
+-};
+-
+ #include "dc_temp.h"
+
+ #endif /* DC_TYPES_H_ */
+diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
+index cf6da5a..63e8c47 100644
+--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
+@@ -640,7 +640,7 @@ static bool is_panel_powered_on(struct dce110_link_encoder *enc110)
+ * @brief
+ * eDP only. Control the power of the eDP panel.
+ */
+-static enum dc_encoder_result link_encoder_edp_power_control(
++static bool link_encoder_edp_power_control(
+ struct dce110_link_encoder *enc110,
+ bool power_up)
+ {
+@@ -651,7 +651,7 @@ static enum dc_encoder_result link_encoder_edp_power_control(
+ if (dal_graphics_object_id_get_connector_id(enc110->base.connector) !=
+ CONNECTOR_ID_EDP) {
+ BREAK_TO_DEBUGGER();
+- return ENCODER_RESULT_ERROR;
++ return false;
+ }
+
+ if ((power_up && !is_panel_powered_on(enc110)) ||
+@@ -694,7 +694,7 @@ static enum dc_encoder_result link_encoder_edp_power_control(
+ __func__, (power_up ? "On":"Off"));
+ }
+
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ /*
+@@ -810,7 +810,7 @@ static bool is_panel_backlight_on(struct dce110_link_encoder *enc110)
+ * @brief
+ * eDP only. Control the backlight of the eDP panel
+ */
+-static enum dc_encoder_result link_encoder_edp_backlight_control(
++static bool link_encoder_edp_backlight_control(
+ struct dce110_link_encoder *enc110,
+ bool enable)
+ {
+@@ -820,7 +820,7 @@ static enum dc_encoder_result link_encoder_edp_backlight_control(
+ if (dal_graphics_object_id_get_connector_id(enc110->base.connector)
+ != CONNECTOR_ID_EDP) {
+ BREAK_TO_DEBUGGER();
+- return ENCODER_RESULT_ERROR;
++ return false;
+ }
+
+ if (enable && is_panel_backlight_on(enc110)) {
+@@ -829,7 +829,7 @@ static enum dc_encoder_result link_encoder_edp_backlight_control(
+ LOG_MINOR_HW_TRACE_RESUME_S3,
+ "%s: panel already powered up. Do nothing.\n",
+ __func__);
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ if (!enable && !is_panel_powered_on(enc110)) {
+@@ -838,7 +838,7 @@ static enum dc_encoder_result link_encoder_edp_backlight_control(
+ LOG_MINOR_HW_TRACE_RESUME_S3,
+ "%s: panel already powered down. Do nothing.\n",
+ __func__);
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ /* Send VBIOS command to control eDP panel backlight */
+@@ -875,7 +875,7 @@ static enum dc_encoder_result link_encoder_edp_backlight_control(
+ dal_adapter_service_get_bios_parser(
+ enc110->base.adapter_service), &cntl);
+
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ static bool is_dig_enabled(const struct dce110_link_encoder *enc110)
+@@ -1239,7 +1239,7 @@ void dce110_link_encoder_destroy(struct link_encoder **enc)
+ *enc = NULL;
+ }
+
+-enum dc_encoder_result dce110_link_encoder_validate_output_with_stream(
++bool dce110_link_encoder_validate_output_with_stream(
+ struct link_encoder *enc,
+ const struct core_stream *stream)
+ {
+@@ -1282,10 +1282,10 @@ enum dc_encoder_result dce110_link_encoder_validate_output_with_stream(
+ break;
+ }
+
+- return is_valid ? ENCODER_RESULT_OK : ENCODER_RESULT_ERROR;
++ return is_valid;
+ }
+
+-enum dc_encoder_result dce110_link_encoder_power_up(
++bool dce110_link_encoder_power_up(
+ struct link_encoder *enc)
+ {
+ struct dce110_link_encoder *enc110 = TO_DCE110_LINK_ENC(enc);
+@@ -1314,7 +1314,7 @@ enum dc_encoder_result dce110_link_encoder_power_up(
+ "%s: Failed to execute VBIOS command table!\n",
+ __func__);
+ BREAK_TO_DEBUGGER();
+- return ENCODER_RESULT_ERROR;
++ return false;
+ }
+
+ if (enc110->base.connector.id == CONNECTOR_ID_LVDS) {
+@@ -1342,7 +1342,7 @@ enum dc_encoder_result dce110_link_encoder_power_up(
+ * So this routine must be called first. */
+ hpd_initialize(enc110);
+
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ void dce110_link_encoder_setup(
+@@ -1386,47 +1386,47 @@ void dce110_link_encoder_setup(
+ dal_write_reg(ctx, addr, value);
+ }
+
+-enum dc_encoder_result dce110_link_encoder_enable_tmds_output(
++bool dce110_link_encoder_enable_tmds_output(
+ struct link_encoder *enc,
+ enum clock_source_id clock_source,
+ enum dc_color_depth color_depth,
+ uint32_t pixel_clock)
+ {
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+-enum dc_encoder_result dce110_link_encoder_enable_dual_link_tmds_output(
++bool dce110_link_encoder_enable_dual_link_tmds_output(
+ struct link_encoder *enc,
+ enum clock_source_id clock_source,
+ enum dc_color_depth color_depth,
+ uint32_t pixel_clock)
+ {
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ /* enables DP PHY output */
+-enum dc_encoder_result dce110_link_encoder_enable_dp_output(
++bool dce110_link_encoder_enable_dp_output(
+ struct link_encoder *enc,
+ const struct link_settings *link_settings,
+ enum clock_source_id clock_source)
+ {
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ /* enables DP PHY output in MST mode */
+-enum dc_encoder_result dce110_link_encoder_enable_dp_mst_output(
++bool dce110_link_encoder_enable_dp_mst_output(
+ struct link_encoder *enc,
+ const struct link_settings *link_settings,
+ enum clock_source_id clock_source)
+ {
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ /*
+ * @brief
+ * Disable transmitter and its encoder
+ */
+-enum dc_encoder_result dce110_link_encoder_disable_output(
++bool dce110_link_encoder_disable_output(
+ struct link_encoder *enc,
+ enum signal_type signal)
+ {
+@@ -1444,7 +1444,7 @@ enum dc_encoder_result dce110_link_encoder_disable_output(
+ dal_adapter_service_should_optimize(
+ enc110->base.adapter_service,
+ OF_SKIP_POWER_DOWN_INACTIVE_ENCODER)) {
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+ /* Power-down RX and disable GPU PHY should be paired.
+ * Disabling PHY without powering down RX may cause
+@@ -1485,10 +1485,10 @@ enum dc_encoder_result dce110_link_encoder_disable_output(
+ link_enc, false); */
+ }
+
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+-enum dc_encoder_result dce110_link_encoder_dp_set_lane_settings(
++bool dce110_link_encoder_dp_set_lane_settings(
+ struct link_encoder *enc,
+ const struct link_training_settings *link_settings)
+ {
+@@ -1499,7 +1499,7 @@ enum dc_encoder_result dce110_link_encoder_dp_set_lane_settings(
+
+ if (!link_settings) {
+ BREAK_TO_DEBUGGER();
+- return ENCODER_RESULT_ERROR;
++ return false;
+ }
+
+ cntl.action = TRANSMITTER_CONTROL_SET_VOLTAGE_AND_PREEMPASIS;
+@@ -1537,7 +1537,7 @@ enum dc_encoder_result dce110_link_encoder_dp_set_lane_settings(
+ enc110->base.adapter_service), &cntl);
+ }
+
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ /* set DP PHY test and training patterns */
+@@ -1848,7 +1848,7 @@ void dce110_link_encoder_set_lcd_backlight_level(
+ * Configure digital transmitter and enable both encoder and transmitter
+ * Actual output will be available after calling unblank()
+ */
+-enum dc_encoder_result dce110_link_encoder_enable_output(
++bool dce110_link_encoder_enable_output(
+ struct link_encoder *enc,
+ const struct link_settings *link_settings,
+ enum engine_id engine,
+@@ -1905,7 +1905,7 @@ enum dc_encoder_result dce110_link_encoder_enable_output(
+ enc110->base.adapter_service),
+ &cntl);
+
+- return ENCODER_RESULT_OK;
++ return true;
+ }
+
+ void dce110_link_encoder_connect_dig_be_to_fe(
+diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h
+index 064e50c..334cc1f 100644
+--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h
++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h
+@@ -46,14 +46,14 @@ struct link_encoder *dce110_link_encoder_create(
+
+ void dce110_link_encoder_destroy(struct link_encoder **enc);
+
+-enum dc_encoder_result dce110_link_encoder_validate_output_with_stream(
++bool dce110_link_encoder_validate_output_with_stream(
+ struct link_encoder *enc,
+ const struct core_stream *stream);
+
+ /****************** HW programming ************************/
+
+ /* initialize HW */ /* why do we initialze aux in here? */
+-enum dc_encoder_result dce110_link_encoder_power_up(struct link_encoder *enc);
++bool dce110_link_encoder_power_up(struct link_encoder *enc);
+
+ /* program DIG_MODE in DIG_BE */
+ /* TODO can this be combined with enable_output? */
+@@ -63,7 +63,7 @@ void dce110_link_encoder_setup(
+
+ /* enables TMDS PHY output */
+ /* TODO: still need depth or just pass in adjusted pixel clock? */
+-enum dc_encoder_result dce110_link_encoder_enable_tmds_output(
++bool dce110_link_encoder_enable_tmds_output(
+ struct link_encoder *enc,
+ enum clock_source_id clock_source,
+ enum dc_color_depth color_depth,
+@@ -71,31 +71,31 @@ enum dc_encoder_result dce110_link_encoder_enable_tmds_output(
+
+ /* enables TMDS PHY output */
+ /* TODO: still need this or just pass in adjusted pixel clock? */
+-enum dc_encoder_result dce110_link_encoder_enable_dual_link_tmds_output(
++bool dce110_link_encoder_enable_dual_link_tmds_output(
+ struct link_encoder *enc,
+ enum clock_source_id clock_source,
+ enum dc_color_depth color_depth,
+ uint32_t pixel_clock);
+
+ /* enables DP PHY output */
+-enum dc_encoder_result dce110_link_encoder_enable_dp_output(
++bool dce110_link_encoder_enable_dp_output(
+ struct link_encoder *enc,
+ const struct link_settings *link_settings,
+ enum clock_source_id clock_source);
+
+ /* enables DP PHY output in MST mode */
+-enum dc_encoder_result dce110_link_encoder_enable_dp_mst_output(
++bool dce110_link_encoder_enable_dp_mst_output(
+ struct link_encoder *enc,
+ const struct link_settings *link_settings,
+ enum clock_source_id clock_source);
+
+ /* disable PHY output */
+-enum dc_encoder_result dce110_link_encoder_disable_output(
++bool dce110_link_encoder_disable_output(
+ struct link_encoder *enc,
+ enum signal_type signal);
+
+ /* set DP lane settings */
+-enum dc_encoder_result dce110_link_encoder_dp_set_lane_settings(
++bool dce110_link_encoder_dp_set_lane_settings(
+ struct link_encoder *enc,
+ const struct link_training_settings *link_settings);
+
+@@ -112,7 +112,7 @@ void dce110_link_encoder_set_lcd_backlight_level(
+ struct link_encoder *enc,
+ uint32_t level);
+
+-enum dc_encoder_result dce110_link_encoder_enable_output(
++bool dce110_link_encoder_enable_output(
+ struct link_encoder *enc,
+ const struct link_settings *link_settings,
+ enum engine_id engine,
+diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
+index 6ad681b..e206802 100644
+--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
++++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
+@@ -474,10 +474,9 @@ static enum dc_status validate_mapped_resource(
+ return DC_FAIL_CONTROLLER_VALIDATE;
+
+
+- if (dce110_link_encoder_validate_output_with_stream(
++ if (!dce110_link_encoder_validate_output_with_stream(
+ link->link_enc,
+- stream)
+- != ENCODER_RESULT_OK)
++ stream))
+ return DC_FAIL_ENC_VALIDATE;
+
+ /* TODO: validate audio ASIC caps, encoder */
+diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h
+index c4151c1..e414021 100644
+--- a/drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h
++++ b/drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h
+@@ -90,10 +90,10 @@ struct hw_sequencer_funcs {
+
+ void (*encoder_destroy)(struct link_encoder **enc);
+
+- enum dc_encoder_result (*encoder_power_up)(
++ bool (*encoder_power_up)(
+ struct link_encoder *enc);
+
+- enum dc_encoder_result (*encoder_enable_output)(
++ bool (*encoder_enable_output)(
+ struct link_encoder *enc,
+ const struct link_settings *link_settings,
+ enum engine_id engine,
+@@ -102,7 +102,7 @@ struct hw_sequencer_funcs {
+ enum dc_color_depth color_depth,
+ uint32_t pixel_clock);
+
+- enum dc_encoder_result (*encoder_disable_output)(
++ bool (*encoder_disable_output)(
+ struct link_encoder *enc,
+ enum signal_type signal);
+
+@@ -110,7 +110,7 @@ struct hw_sequencer_funcs {
+ struct link_encoder *enc,
+ const struct encoder_set_dp_phy_pattern_param *param);
+
+- enum dc_encoder_result (*encoder_dp_set_lane_settings)(
++ bool (*encoder_dp_set_lane_settings)(
+ struct link_encoder *enc,
+ const struct link_training_settings *link_settings);
+
+--
+2.7.4
+