diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0533-drm-amd-dal-Don-t-retrain-the-link-when-enabling-2nd.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0533-drm-amd-dal-Don-t-retrain-the-link-when-enabling-2nd.patch | 121 |
1 files changed, 121 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0533-drm-amd-dal-Don-t-retrain-the-link-when-enabling-2nd.patch b/common/recipes-kernel/linux/files/0533-drm-amd-dal-Don-t-retrain-the-link-when-enabling-2nd.patch new file mode 100644 index 00000000..9bc612df --- /dev/null +++ b/common/recipes-kernel/linux/files/0533-drm-amd-dal-Don-t-retrain-the-link-when-enabling-2nd.patch @@ -0,0 +1,121 @@ +From 6d4d095d35d911aaa0387649958a8d1feb3ce2c8 Mon Sep 17 00:00:00 2001 +From: Harry Wentland <harry.wentland@amd.com> +Date: Fri, 27 Nov 2015 00:04:11 -0500 +Subject: [PATCH 0533/1110] drm/amd/dal: Don't retrain the link when enabling + 2nd stream + +For MST we don't want to retrain the link when enabling +the 2nd stream. This avoids that but also introduces a hole +in the logic in that we don't disable the link after the +last stream is cleaned up. This logic needs to be cleaned up +further. + +Signed-off-by: Harry Wentland <harry.wentland@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/dal/dc/core/dc_link.c | 14 +++++++++++--- + drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c | 18 +++++++++++++----- + drivers/gpu/drm/amd/dal/dc/inc/core_types.h | 3 ++- + drivers/gpu/drm/amd/dal/dc/inc/link_hwss.h | 2 +- + 4 files changed, 27 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c +index 0e97180..3484db5 100644 +--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c ++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c +@@ -919,10 +919,18 @@ static enum dc_status enable_link_dp(struct core_stream *stream) + static enum dc_status enable_link_dp_mst(struct core_stream *stream) + { + struct core_link *link = stream->sink->link; ++ bool already_enabled = false; ++ int i; ++ ++ ++ for (i = 0; i < link->enabled_stream_count; i++) { ++ if (link->enabled_streams[i] == stream) ++ already_enabled = true; ++ } + + /* TODO MST link shared by stream. counter? */ +- if (link->stream_count < 4) +- link->stream_count++; ++ if (!already_enabled) ++ link->enabled_streams[link->enabled_stream_count++] = stream; + + /* sink signal type after MST branch is MST. Multiple MST sinks + * share one link. Link DP PHY is enable or training only once. +@@ -1045,7 +1053,7 @@ enum dc_status core_link_disable(struct core_stream *stream) + stream->sink->link, stream->signal); + else { + dp_disable_link_phy_mst( +- stream->sink->link, stream->signal); ++ stream->sink->link, stream); + } + } + +diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c +index 3d6e2ea..551a98f 100644 +--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c ++++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link_hwss.c +@@ -83,18 +83,26 @@ void dp_disable_link_phy(struct core_link *link, enum signal_type signal) + sizeof(link->cur_link_settings)); + } + +-void dp_disable_link_phy_mst(struct core_link *link, enum signal_type signal) ++void dp_disable_link_phy_mst(struct core_link *link, struct core_stream *stream) + { ++ int i, j; ++ ++ for (i = 0; i < link->enabled_stream_count; i++) { ++ if (link->enabled_streams[i] == stream) { ++ link->enabled_stream_count--; ++ for (j = i; i < link->enabled_stream_count; j++) ++ link->enabled_streams[j] = link->enabled_streams[j+1]; ++ } ++ } + /* MST disable link only when no stream use the link */ +- if (link->stream_count > 0) +- link->stream_count--; +- if (link->stream_count > 0) ++ if (link->enabled_stream_count > 0) { + return; ++ } + + if (!link->dp_wa.bits.KEEP_RECEIVER_POWERED) + dp_receiver_power_ctrl(link, false); + +- link->dc->hwss.encoder_disable_output(link->link_enc, signal); ++ link->dc->hwss.encoder_disable_output(link->link_enc, stream->signal); + + /* Clear current link setting.*/ + dc_service_memset(&link->cur_link_settings, 0, +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/core_types.h b/drivers/gpu/drm/amd/dal/dc/inc/core_types.h +index 0b06314..f18034c 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/core_types.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/core_types.h +@@ -227,7 +227,8 @@ struct core_link { + union dp_wa dp_wa; + + /* MST record stream using this link */ +- uint8_t stream_count; ++ const struct core_stream *enabled_streams[MAX_SINKS_PER_LINK]; ++ uint8_t enabled_stream_count; + }; + + #define DC_LINK_TO_LINK(dc_link) container_of(dc_link, struct core_link, public) +diff --git a/drivers/gpu/drm/amd/dal/dc/inc/link_hwss.h b/drivers/gpu/drm/amd/dal/dc/inc/link_hwss.h +index a008544..c86c942 100644 +--- a/drivers/gpu/drm/amd/dal/dc/inc/link_hwss.h ++++ b/drivers/gpu/drm/amd/dal/dc/inc/link_hwss.h +@@ -50,7 +50,7 @@ void dp_receiver_power_ctrl(struct core_link *link, bool on); + + void dp_disable_link_phy(struct core_link *link, enum signal_type signal); + +-void dp_disable_link_phy_mst(struct core_link *link, enum signal_type signal); ++void dp_disable_link_phy_mst(struct core_link *link, struct core_stream *stream); + + bool dp_set_hw_training_pattern( + struct core_link *link, +-- +2.7.4 + |