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-rw-r--r--common/recipes-kernel/linux/files/0522-drm-amd-dal-fix-mem_input-naming-and-function-order.patch218
1 files changed, 0 insertions, 218 deletions
diff --git a/common/recipes-kernel/linux/files/0522-drm-amd-dal-fix-mem_input-naming-and-function-order.patch b/common/recipes-kernel/linux/files/0522-drm-amd-dal-fix-mem_input-naming-and-function-order.patch
deleted file mode 100644
index 36157d72..00000000
--- a/common/recipes-kernel/linux/files/0522-drm-amd-dal-fix-mem_input-naming-and-function-order.patch
+++ /dev/null
@@ -1,218 +0,0 @@
-From 76232e98efcee158a5b5aae58ea48532b458d2f7 Mon Sep 17 00:00:00 2001
-From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
-Date: Wed, 25 Nov 2015 16:22:58 -0500
-Subject: [PATCH 0522/1110] drm/amd/dal: fix mem_input naming and function
- order
-
-Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
-Signed-off-by: Harry Wentland <harry.wentland@amd.com>
-Acked-by: Harry Wentland <harry.wentland@amd.com>
----
- .../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 14 ++++-----
- .../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c | 20 +++++++------
- .../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h | 33 +++++++++++-----------
- 3 files changed, 35 insertions(+), 32 deletions(-)
-
-diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
-index 24e35cd..dddc6e2 100644
---- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
-+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
-@@ -897,7 +897,7 @@ static enum dc_status apply_single_controller_ctx_to_hw(uint8_t controller_idx,
- }
-
- /*TODO: mst support - use total stream count*/
-- dce110_allocate_dmif_buffer(stream->mi,
-+ dce110_mem_input_allocate_dmif_buffer(stream->mi,
- &stream->public.timing,
- context->target_count);
-
-@@ -1259,17 +1259,17 @@ static void set_displaymarks(
- for (j = 0; j < target->stream_count; j++) {
- struct core_stream *stream = target->streams[j];
-
-- dce110_program_nbp_watermark(
-+ dce110_mem_input_program_nbp_watermark(
- stream->mi,
- context->bw_results
- .nbp_state_change_watermark[total_streams]);
-
-- dce110_program_stutter_watermark(
-+ dce110_mem_input_program_stutter_watermark(
- stream->mi,
- context->bw_results
- .stutter_exit_watermark[total_streams]);
-
-- dce110_program_urgency_watermark(
-+ dce110_mem_input_program_urgency_watermark(
- stream->mi,
- context->bw_results
- .urgent_watermark[total_streams],
-@@ -1293,7 +1293,7 @@ static void set_safe_displaymarks(struct validate_context *context)
- for (j = 0; j < target->stream_count; j++) {
- struct core_stream *stream = target->streams[j];
-
-- dce110_program_safe_display_marks(stream->mi);
-+ dce110_mem_input_program_safe_display_marks(stream->mi);
- }
- }
- }
-@@ -1588,7 +1588,7 @@ static bool set_plane_config(
- PIPE_LOCK_CONTROL_SURFACE,
- true);
-
-- dce110_program_pix_dur(mi, dc_crtc_timing->pix_clk_khz);
-+ dce110_mem_input_program_pix_dur(mi, dc_crtc_timing->pix_clk_khz);
-
- dce110_timing_generator_program_blanking(tg, dc_crtc_timing);
-
-@@ -1679,7 +1679,7 @@ static void reset_single_stream_hw_ctx(struct core_stream *stream,
- core_link_disable(stream);
- dce110_timing_generator_blank_crtc(stream->tg);
- dce110_timing_generator_disable_crtc(stream->tg);
-- dce110_deallocate_dmif_buffer(stream->mi, context->target_count);
-+ dce110_mem_input_deallocate_dmif_buffer(stream->mi, context->target_count);
- dce110_transform_set_scaler_bypass(stream->xfm);
- disable_stereo_mixer(stream->ctx);
- unreference_clock_source(&context->res_ctx, stream->clock_source);
-diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c
-index 50354a9..e84a1ae 100644
---- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c
-+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.c
-@@ -533,7 +533,7 @@ static void program_urgency_watermark(
- dal_write_reg(ctx, urgency_addr, urgency_cntl);
- }
-
--void dce110_program_stutter_watermark(
-+void dce110_mem_input_program_stutter_watermark(
- struct mem_input *mi,
- struct bw_watermarks marks)
- {
-@@ -599,7 +599,7 @@ void dce110_program_stutter_watermark(
- dal_write_reg(ctx, stutter_addr, stutter_cntl);
- }
-
--void dce110_program_nbp_watermark(
-+void dce110_mem_input_program_nbp_watermark(
- struct mem_input *mi,
- struct bw_watermarks marks)
- {
-@@ -684,7 +684,7 @@ void dce110_program_nbp_watermark(
- dal_write_reg(ctx, addr, value);
- }
-
--void dce110_program_safe_display_marks(struct mem_input *mi)
-+void dce110_mem_input_program_safe_display_marks(struct mem_input *mi)
- {
- struct dce110_mem_input *bm_dce110 = TO_DCE110_MEM_INPUT(mi);
- struct bw_watermarks max_marks = { MAX_WATERMARK, MAX_WATERMARK };
-@@ -692,12 +692,12 @@ void dce110_program_safe_display_marks(struct mem_input *mi)
-
- program_urgency_watermark(
- mi->ctx, bm_dce110->offsets.dmif, max_marks, MAX_WATERMARK);
-- dce110_program_stutter_watermark(mi, max_marks);
-- dce110_program_nbp_watermark(mi, nbp_marks);
-+ dce110_mem_input_program_stutter_watermark(mi, max_marks);
-+ dce110_mem_input_program_nbp_watermark(mi, nbp_marks);
-
- }
-
--void dce110_program_urgency_watermark(
-+void dce110_mem_input_program_urgency_watermark(
- struct mem_input *mi,
- struct bw_watermarks marks,
- uint32_t h_total,
-@@ -758,7 +758,7 @@ static uint32_t get_dmif_switch_time_us(struct dc_crtc_timing *timing)
- return frame_time;
- }
-
--void dce110_allocate_dmif_buffer(
-+void dce110_mem_input_allocate_dmif_buffer(
- struct mem_input *mi,
- struct dc_crtc_timing *timing,
- uint32_t paths_num)
-@@ -863,7 +863,8 @@ static void deallocate_dmif_buffer_helper(
- DMIF_BUFFERS_ALLOCATION_COMPLETED));
- }
-
--void dce110_deallocate_dmif_buffer(struct mem_input *mi, uint32_t paths_num)
-+void dce110_mem_input_deallocate_dmif_buffer(
-+ struct mem_input *mi, uint32_t paths_num)
- {
- struct dce110_mem_input *bm_dce110 = TO_DCE110_MEM_INPUT(mi);
- uint32_t value;
-@@ -896,7 +897,8 @@ void dce110_deallocate_dmif_buffer(struct mem_input *mi, uint32_t paths_num)
- dal_write_reg(mi->ctx, mmMC_HUB_RDREQ_DMIF_LIMIT, value);
- }
-
--void dce110_program_pix_dur(struct mem_input *mi, uint32_t pix_clk_khz)
-+void dce110_mem_input_program_pix_dur(
-+ struct mem_input *mi, uint32_t pix_clk_khz)
- {
- uint64_t pix_dur;
- uint32_t addr = mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1
-diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h
-index 9c6d278..0d23c81 100644
---- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h
-+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h
-@@ -48,41 +48,42 @@ struct mem_input *dce110_mem_input_create(
-
- void dce110_mem_input_destroy(struct mem_input **mem_input);
-
--bool dce110_mem_input_program_surface_flip_and_addr(
-- struct mem_input *mem_input,
-- const struct dc_plane_address *address,
-- bool flip_immediate);
--
--bool dce110_mem_input_program_surface_config(
-- struct mem_input *mem_input,
-- const struct dc_surface *surface);
-+void dce110_mem_input_program_safe_display_marks(struct mem_input *mi);
-
--void dce110_program_nbp_watermark(
-+void dce110_mem_input_program_nbp_watermark(
- struct mem_input *mem_input,
- struct bw_watermarks marks);
-
--void dce110_program_stutter_watermark(
-+void dce110_mem_input_program_stutter_watermark(
- struct mem_input *mem_input,
- struct bw_watermarks marks);
-
--void dce110_program_urgency_watermark(
-+void dce110_mem_input_program_urgency_watermark(
- struct mem_input *mem_input,
- struct bw_watermarks marks,
- uint32_t h_total,
- uint32_t pixel_clk_in_khz,
- uint32_t pstate_blackout_duration_ns);
-
--void dce110_program_safe_display_marks(struct mem_input *mi);
--
--void dce110_allocate_dmif_buffer(
-+void dce110_mem_input_allocate_dmif_buffer(
- struct mem_input *mem_input,
- struct dc_crtc_timing *timing,
- uint32_t paths_num);
-
--void dce110_deallocate_dmif_buffer(
-+void dce110_mem_input_deallocate_dmif_buffer(
- struct mem_input *mem_input, uint32_t paths_num);
-
--void dce110_program_pix_dur(
-+void dce110_mem_input_program_pix_dur(
- struct mem_input *mem_input, uint32_t pix_clk_khz);
-
-+bool dce110_mem_input_program_surface_flip_and_addr(
-+ struct mem_input *mem_input,
-+ const struct dc_plane_address *address,
-+ bool flip_immediate);
-+
-+bool dce110_mem_input_program_surface_config(
-+ struct mem_input *mem_input,
-+ const struct dc_surface *surface);
-+
-+
- #endif
---
-2.7.4
-