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-rw-r--r--common/recipes-kernel/linux/files/0475-drm-amd-powerplay-mark-phm_master_table_-structs-as-.patch260
1 files changed, 260 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0475-drm-amd-powerplay-mark-phm_master_table_-structs-as-.patch b/common/recipes-kernel/linux/files/0475-drm-amd-powerplay-mark-phm_master_table_-structs-as-.patch
new file mode 100644
index 00000000..11c70ec0
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0475-drm-amd-powerplay-mark-phm_master_table_-structs-as-.patch
@@ -0,0 +1,260 @@
+From 9a89ad0b41464fb955182a7b4ab80f0d2fb52313 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Nils=20Wallm=C3=A9nius?= <nils.wallmenius@gmail.com>
+Date: Sun, 10 Apr 2016 16:30:03 +0200
+Subject: [PATCH 0475/1110] drm/amd/powerplay: mark phm_master_table_* structs
+ as const
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Also adjust phm_construct_table to take a const pointer
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ .../drm/amd/powerplay/hwmgr/cz_clockpowergating.c | 4 ++--
+ .../drm/amd/powerplay/hwmgr/cz_clockpowergating.h | 2 +-
+ drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 20 ++++++++++----------
+ drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c | 8 ++++----
+ drivers/gpu/drm/amd/powerplay/hwmgr/functiontables.c | 2 +-
+ drivers/gpu/drm/amd/powerplay/hwmgr/tonga_thermal.c | 8 ++++----
+ drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 4 ++--
+ 7 files changed, 24 insertions(+), 24 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
+index ff08ce4..436fc16 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
+@@ -237,7 +237,7 @@ int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
+ }
+
+
+-static struct phm_master_table_item cz_enable_clock_power_gatings_list[] = {
++static const struct phm_master_table_item cz_enable_clock_power_gatings_list[] = {
+ /*we don't need an exit table here, because there is only D3 cold on Kv*/
+ { phm_cf_want_uvd_power_gating, cz_tf_uvd_power_gating_initialize },
+ { phm_cf_want_vce_power_gating, cz_tf_vce_power_gating_initialize },
+@@ -245,7 +245,7 @@ static struct phm_master_table_item cz_enable_clock_power_gatings_list[] = {
+ { NULL, NULL }
+ };
+
+-struct phm_master_table_header cz_phm_enable_clock_power_gatings_master = {
++const struct phm_master_table_header cz_phm_enable_clock_power_gatings_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+ cz_enable_clock_power_gatings_list
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h
+index bbbc057..35e1b36 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h
+@@ -28,7 +28,7 @@
+ #include "pp_asicblocks.h"
+
+ extern int cz_phm_set_asic_block_gating(struct pp_hwmgr *hwmgr, enum PHM_AsicBlock block, enum PHM_ClockGateSetting gating);
+-extern struct phm_master_table_header cz_phm_enable_clock_power_gatings_master;
++extern const struct phm_master_table_header cz_phm_enable_clock_power_gatings_master;
+ extern struct phm_master_table_header cz_phm_disable_clock_power_gatings_master;
+ extern int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate);
+ extern int cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate);
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+index 5682490..648394f 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+@@ -915,7 +915,7 @@ static int cz_tf_update_low_mem_pstate(struct pp_hwmgr *hwmgr,
+ return 0;
+ }
+
+-static struct phm_master_table_item cz_set_power_state_list[] = {
++static const struct phm_master_table_item cz_set_power_state_list[] = {
+ {NULL, cz_tf_update_sclk_limit},
+ {NULL, cz_tf_set_deep_sleep_sclk_threshold},
+ {NULL, cz_tf_set_watermark_threshold},
+@@ -925,13 +925,13 @@ static struct phm_master_table_item cz_set_power_state_list[] = {
+ {NULL, NULL}
+ };
+
+-static struct phm_master_table_header cz_set_power_state_master = {
++static const struct phm_master_table_header cz_set_power_state_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+ cz_set_power_state_list
+ };
+
+-static struct phm_master_table_item cz_setup_asic_list[] = {
++static const struct phm_master_table_item cz_setup_asic_list[] = {
+ {NULL, cz_tf_reset_active_process_mask},
+ {NULL, cz_tf_upload_pptable_to_smu},
+ {NULL, cz_tf_init_sclk_limit},
+@@ -943,7 +943,7 @@ static struct phm_master_table_item cz_setup_asic_list[] = {
+ {NULL, NULL}
+ };
+
+-static struct phm_master_table_header cz_setup_asic_master = {
++static const struct phm_master_table_header cz_setup_asic_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+ cz_setup_asic_list
+@@ -984,14 +984,14 @@ static int cz_tf_reset_cc6_data(struct pp_hwmgr *hwmgr,
+ return 0;
+ }
+
+-static struct phm_master_table_item cz_power_down_asic_list[] = {
++static const struct phm_master_table_item cz_power_down_asic_list[] = {
+ {NULL, cz_tf_power_up_display_clock_sys_pll},
+ {NULL, cz_tf_clear_nb_dpm_flag},
+ {NULL, cz_tf_reset_cc6_data},
+ {NULL, NULL}
+ };
+
+-static struct phm_master_table_header cz_power_down_asic_master = {
++static const struct phm_master_table_header cz_power_down_asic_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+ cz_power_down_asic_list
+@@ -1095,19 +1095,19 @@ static int cz_tf_check_for_dpm_enabled(struct pp_hwmgr *hwmgr,
+ return 0;
+ }
+
+-static struct phm_master_table_item cz_disable_dpm_list[] = {
++static const struct phm_master_table_item cz_disable_dpm_list[] = {
+ { NULL, cz_tf_check_for_dpm_enabled},
+ {NULL, NULL},
+ };
+
+
+-static struct phm_master_table_header cz_disable_dpm_master = {
++static const struct phm_master_table_header cz_disable_dpm_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+ cz_disable_dpm_list
+ };
+
+-static struct phm_master_table_item cz_enable_dpm_list[] = {
++static const struct phm_master_table_item cz_enable_dpm_list[] = {
+ { NULL, cz_tf_check_for_dpm_disabled },
+ { NULL, cz_tf_program_voting_clients },
+ { NULL, cz_tf_start_dpm},
+@@ -1117,7 +1117,7 @@ static struct phm_master_table_item cz_enable_dpm_list[] = {
+ {NULL, NULL},
+ };
+
+-static struct phm_master_table_header cz_enable_dpm_master = {
++static const struct phm_master_table_header cz_enable_dpm_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+ cz_enable_dpm_list
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c
+index e76a7de..e2b448f 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c
+@@ -615,7 +615,7 @@ static int tf_fiji_thermal_disable_alert(struct pp_hwmgr *hwmgr,
+ return fiji_thermal_disable_alert(hwmgr);
+ }
+
+-static struct phm_master_table_item
++static const struct phm_master_table_item
+ fiji_thermal_start_thermal_controller_master_list[] = {
+ {NULL, tf_fiji_thermal_initialize},
+ {NULL, tf_fiji_thermal_set_temperature_range},
+@@ -630,14 +630,14 @@ fiji_thermal_start_thermal_controller_master_list[] = {
+ {NULL, NULL}
+ };
+
+-static struct phm_master_table_header
++static const struct phm_master_table_header
+ fiji_thermal_start_thermal_controller_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+ fiji_thermal_start_thermal_controller_master_list
+ };
+
+-static struct phm_master_table_item
++static const struct phm_master_table_item
+ fiji_thermal_set_temperature_range_master_list[] = {
+ {NULL, tf_fiji_thermal_disable_alert},
+ {NULL, tf_fiji_thermal_set_temperature_range},
+@@ -645,7 +645,7 @@ fiji_thermal_set_temperature_range_master_list[] = {
+ {NULL, NULL}
+ };
+
+-struct phm_master_table_header
++static const struct phm_master_table_header
+ fiji_thermal_set_temperature_range_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/functiontables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/functiontables.c
+index 72cfecc..7a705ce 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/functiontables.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/functiontables.c
+@@ -84,7 +84,7 @@ int phm_dispatch_table(struct pp_hwmgr *hwmgr,
+ }
+
+ int phm_construct_table(struct pp_hwmgr *hwmgr,
+- struct phm_master_table_header *master_table,
++ const struct phm_master_table_header *master_table,
+ struct phm_runtime_table_header *rt_table)
+ {
+ uint32_t function_count = 0;
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_thermal.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_thermal.c
+index a188174..23f8463 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_thermal.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_thermal.c
+@@ -525,7 +525,7 @@ static int tf_tonga_thermal_disable_alert(struct pp_hwmgr *hwmgr, void *input, v
+ return tonga_thermal_disable_alert(hwmgr);
+ }
+
+-static struct phm_master_table_item tonga_thermal_start_thermal_controller_master_list[] = {
++static const struct phm_master_table_item tonga_thermal_start_thermal_controller_master_list[] = {
+ { NULL, tf_tonga_thermal_initialize },
+ { NULL, tf_tonga_thermal_set_temperature_range },
+ { NULL, tf_tonga_thermal_enable_alert },
+@@ -538,20 +538,20 @@ static struct phm_master_table_item tonga_thermal_start_thermal_controller_maste
+ { NULL, NULL }
+ };
+
+-static struct phm_master_table_header tonga_thermal_start_thermal_controller_master = {
++static const struct phm_master_table_header tonga_thermal_start_thermal_controller_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+ tonga_thermal_start_thermal_controller_master_list
+ };
+
+-static struct phm_master_table_item tonga_thermal_set_temperature_range_master_list[] = {
++static const struct phm_master_table_item tonga_thermal_set_temperature_range_master_list[] = {
+ { NULL, tf_tonga_thermal_disable_alert},
+ { NULL, tf_tonga_thermal_set_temperature_range},
+ { NULL, tf_tonga_thermal_enable_alert},
+ { NULL, NULL }
+ };
+
+-struct phm_master_table_header tonga_thermal_set_temperature_range_master = {
++static const struct phm_master_table_header tonga_thermal_set_temperature_range_master = {
+ 0,
+ PHM_MasterTableFlag_None,
+ tonga_thermal_set_temperature_range_master_list
+diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+index 928f5a7..e1ca36c 100644
+--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
++++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+@@ -141,7 +141,7 @@ enum phm_master_table_flag {
+ struct phm_master_table_header {
+ uint32_t storage_size;
+ uint32_t flags;
+- struct phm_master_table_item *master_list;
++ const struct phm_master_table_item *master_list;
+ };
+
+ struct phm_runtime_table_header {
+@@ -199,7 +199,7 @@ extern int phm_dispatch_table(struct pp_hwmgr *hwmgr,
+ void *input, void *output);
+
+ extern int phm_construct_table(struct pp_hwmgr *hwmgr,
+- struct phm_master_table_header *master_table,
++ const struct phm_master_table_header *master_table,
+ struct phm_runtime_table_header *rt_table);
+
+ extern int phm_destroy_table(struct pp_hwmgr *hwmgr,
+--
+2.7.4
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-23 10:45:04 +0000