diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0452-drm-amdgpu-fix-issue-that-can-t-set-vce-clock-gate.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0452-drm-amdgpu-fix-issue-that-can-t-set-vce-clock-gate.patch | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0452-drm-amdgpu-fix-issue-that-can-t-set-vce-clock-gate.patch b/common/recipes-kernel/linux/files/0452-drm-amdgpu-fix-issue-that-can-t-set-vce-clock-gate.patch new file mode 100644 index 00000000..07ae3a3e --- /dev/null +++ b/common/recipes-kernel/linux/files/0452-drm-amdgpu-fix-issue-that-can-t-set-vce-clock-gate.patch @@ -0,0 +1,63 @@ +From 8c7f27c3806f085ad54a2825f8cadbdca25d5330 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Wed, 16 Mar 2016 14:45:40 +0800 +Subject: [PATCH 0452/1110] drm/amdgpu: fix issue that can't set vce clock + gate. +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Acked-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 18 +++++++++++++++++- + 1 file changed, 17 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c +index c7e885b..fda89ec 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c +@@ -44,7 +44,7 @@ + static void vce_v2_0_mc_resume(struct amdgpu_device *adev); + static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev); + static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev); +- ++static int vce_v2_0_wait_for_idle(void *handle); + /** + * vce_v2_0_ring_get_rptr - get read pointer + * +@@ -339,6 +339,21 @@ static void vce_v2_0_set_dyn_cg(struct amdgpu_device *adev, bool gated) + { + u32 orig, tmp; + ++ if (gated) { ++ if (vce_v2_0_wait_for_idle(adev)) { ++ DRM_INFO("VCE is busy, Can't set clock gateing"); ++ return; ++ } ++ WREG32_P(mmVCE_VCPU_CNTL, 0, ~VCE_VCPU_CNTL__CLK_EN_MASK); ++ WREG32_P(mmVCE_SOFT_RESET, VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK, ~VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK); ++ mdelay(100); ++ WREG32(mmVCE_STATUS, 0); ++ } else { ++ WREG32_P(mmVCE_VCPU_CNTL, VCE_VCPU_CNTL__CLK_EN_MASK, ~VCE_VCPU_CNTL__CLK_EN_MASK); ++ WREG32_P(mmVCE_SOFT_RESET, VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK, ~VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK); ++ mdelay(100); ++ } ++ + tmp = RREG32(mmVCE_CLOCK_GATING_B); + tmp &= ~0x00060006; + if (gated) { +@@ -362,6 +377,7 @@ static void vce_v2_0_set_dyn_cg(struct amdgpu_device *adev, bool gated) + + if (gated) + WREG32(mmVCE_CGTT_CLK_OVERRIDE, 0); ++ WREG32_P(mmVCE_SOFT_RESET, 0, ~VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK); + } + + static void vce_v2_0_disable_cg(struct amdgpu_device *adev) +-- +2.7.4 + |