diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0433-drm-amd-powerplay-fix-issue-that-resume-back-dpm-can.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0433-drm-amd-powerplay-fix-issue-that-resume-back-dpm-can.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0433-drm-amd-powerplay-fix-issue-that-resume-back-dpm-can.patch b/common/recipes-kernel/linux/files/0433-drm-amd-powerplay-fix-issue-that-resume-back-dpm-can.patch new file mode 100644 index 00000000..44a4c02e --- /dev/null +++ b/common/recipes-kernel/linux/files/0433-drm-amd-powerplay-fix-issue-that-resume-back-dpm-can.patch @@ -0,0 +1,61 @@ +From b1b7c0b52b5d8b1682a3934645e892b97c378979 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Mon, 4 Apr 2016 15:57:10 +0800 +Subject: [PATCH 0433/1110] drm/amd/powerplay: fix issue that resume back, dpm + can't work on FIJI. + +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +index a21f58e..89f31bc 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +@@ -2389,6 +2389,7 @@ static int fiji_populate_smc_vce_level(struct pp_hwmgr *hwmgr, + + for(count = 0; count < table->VceLevelCount; count++) { + table->VceLevel[count].Frequency = mm_table->entries[count].eclk; ++ table->VceLevel[count].MinVoltage = 0; + table->VceLevel[count].MinVoltage |= + (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; + table->VceLevel[count].MinVoltage |= +@@ -2465,6 +2466,7 @@ static int fiji_populate_smc_samu_level(struct pp_hwmgr *hwmgr, + + for (count = 0; count < table->SamuLevelCount; count++) { + /* not sure whether we need evclk or not */ ++ table->SamuLevel[count].MinVoltage = 0; + table->SamuLevel[count].Frequency = mm_table->entries[count].samclock; + table->SamuLevel[count].MinVoltage |= (mm_table->entries[count].vddc * + VOLTAGE_SCALE) << VDDC_SHIFT; +@@ -2562,6 +2564,7 @@ static int fiji_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, + table->UvdBootLevel = 0; + + for (count = 0; count < table->UvdLevelCount; count++) { ++ table->UvdLevel[count].MinVoltage = 0; + table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; + table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; + table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * +@@ -2900,6 +2903,8 @@ static int fiji_init_smc_table(struct pp_hwmgr *hwmgr) + if(FIJI_VOLTAGE_CONTROL_NONE != data->voltage_control) + fiji_populate_smc_voltage_tables(hwmgr, table); + ++ table->SystemFlags = 0; ++ + if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_AutomaticDCTransition)) + table->SystemFlags |= PPSMC_SYSTEMFLAG_GPIO_DC; +@@ -2997,6 +3002,7 @@ static int fiji_init_smc_table(struct pp_hwmgr *hwmgr) + table->MemoryThermThrottleEnable = 1; + table->PCIeBootLinkLevel = 0; /* 0:Gen1 1:Gen2 2:Gen3*/ + table->PCIeGenInterval = 1; ++ table->VRConfig = 0; + + result = fiji_populate_vr_config(hwmgr, table); + PP_ASSERT_WITH_CODE(0 == result, +-- +2.7.4 + |