diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0380-drm-amdgpu-Revert-add-lock-for-interval-tree-in-vm.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0380-drm-amdgpu-Revert-add-lock-for-interval-tree-in-vm.patch | 117 |
1 files changed, 117 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0380-drm-amdgpu-Revert-add-lock-for-interval-tree-in-vm.patch b/common/recipes-kernel/linux/files/0380-drm-amdgpu-Revert-add-lock-for-interval-tree-in-vm.patch new file mode 100644 index 00000000..5ba2bbd4 --- /dev/null +++ b/common/recipes-kernel/linux/files/0380-drm-amdgpu-Revert-add-lock-for-interval-tree-in-vm.patch @@ -0,0 +1,117 @@ +From 689e07f1db7dbd6d5bd7ba7a2e43a2c4245dd8b2 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Tue, 8 Mar 2016 17:58:35 +0100 +Subject: [PATCH 0380/1110] drm/amdgpu: Revert "add lock for interval tree in + vm" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Not needed any more because we need to protect the elements on the list anyway. + +This reverts commit fe237ed7efec8ac147a4572fdf81173a7f8ddda7. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Chunming Zhou <david1.zhou@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 - + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 16 ++-------------- + 2 files changed, 2 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index 66aef04..929bf7f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -847,7 +847,6 @@ struct amdgpu_vm_id { + + struct amdgpu_vm { + /* tree of virtual addresses mapped */ +- spinlock_t it_lock; + struct rb_root va; + + /* protecting invalidated */ +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index c6b890c..f6d7d3f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -1112,9 +1112,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev, + saddr /= AMDGPU_GPU_PAGE_SIZE; + eaddr /= AMDGPU_GPU_PAGE_SIZE; + +- spin_lock(&vm->it_lock); + it = interval_tree_iter_first(&vm->va, saddr, eaddr); +- spin_unlock(&vm->it_lock); + if (it) { + struct amdgpu_bo_va_mapping *tmp; + tmp = container_of(it, struct amdgpu_bo_va_mapping, it); +@@ -1141,10 +1139,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev, + mutex_lock(&bo_va->mutex); + list_add(&mapping->list, &bo_va->invalids); + mutex_unlock(&bo_va->mutex); +- spin_lock(&vm->it_lock); + interval_tree_insert(&mapping->it, &vm->va); +- spin_unlock(&vm->it_lock); +- trace_amdgpu_vm_bo_map(bo_va, mapping); + + /* Make sure the page tables are allocated */ + saddr >>= amdgpu_vm_block_size; +@@ -1196,9 +1191,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev, + + error_free: + list_del(&mapping->list); +- spin_lock(&vm->it_lock); + interval_tree_remove(&mapping->it, &vm->va); +- spin_unlock(&vm->it_lock); + trace_amdgpu_vm_bo_unmap(bo_va, mapping); + kfree(mapping); + +@@ -1248,9 +1241,7 @@ int amdgpu_vm_bo_unmap(struct amdgpu_device *adev, + } + mutex_unlock(&bo_va->mutex); + list_del(&mapping->list); +- spin_lock(&vm->it_lock); + interval_tree_remove(&mapping->it, &vm->va); +- spin_unlock(&vm->it_lock); + trace_amdgpu_vm_bo_unmap(bo_va, mapping); + + if (valid) +@@ -1285,17 +1276,13 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev, + + list_for_each_entry_safe(mapping, next, &bo_va->valids, list) { + list_del(&mapping->list); +- spin_lock(&vm->it_lock); + interval_tree_remove(&mapping->it, &vm->va); +- spin_unlock(&vm->it_lock); + trace_amdgpu_vm_bo_unmap(bo_va, mapping); + list_add(&mapping->list, &vm->freed); + } + list_for_each_entry_safe(mapping, next, &bo_va->invalids, list) { + list_del(&mapping->list); +- spin_lock(&vm->it_lock); + interval_tree_remove(&mapping->it, &vm->va); +- spin_unlock(&vm->it_lock); + kfree(mapping); + } + fence_put(bo_va->last_pt_update); +@@ -1354,7 +1341,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm) + INIT_LIST_HEAD(&vm->invalidated); + INIT_LIST_HEAD(&vm->cleared); + INIT_LIST_HEAD(&vm->freed); +- spin_lock_init(&vm->it_lock); ++ + pd_size = amdgpu_vm_directory_size(adev); + pd_entries = amdgpu_vm_num_pdes(adev); + +@@ -1438,6 +1425,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm) + + amdgpu_bo_unref(&vm->page_directory); + fence_put(vm->page_directory_fence); ++ + for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { + struct amdgpu_vm_id *id = &vm->ids[i]; + +-- +2.7.4 + |