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-rw-r--r--common/recipes-kernel/linux/files/0339-drm-amdgpu-add-context-buffer-size-check-for-HEVC.patch74
1 files changed, 0 insertions, 74 deletions
diff --git a/common/recipes-kernel/linux/files/0339-drm-amdgpu-add-context-buffer-size-check-for-HEVC.patch b/common/recipes-kernel/linux/files/0339-drm-amdgpu-add-context-buffer-size-check-for-HEVC.patch
deleted file mode 100644
index ae7c534d..00000000
--- a/common/recipes-kernel/linux/files/0339-drm-amdgpu-add-context-buffer-size-check-for-HEVC.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 8c8bac59dda0c41c7dd289d443ac42b7b72d31b0 Mon Sep 17 00:00:00 2001
-From: Boyuan Zhang <boyuan.zhang@amd.com>
-Date: Wed, 5 Aug 2015 14:03:48 -0400
-Subject: [PATCH 0339/1050] drm/amdgpu: add context buffer size check for HEVC
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
-Reviewed-by: Christian König <christian.koenig@amd.com>
----
- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 17 ++++++++++++++---
- 1 file changed, 14 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
-index 2f7a5ef..f5c2255 100644
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
-@@ -374,7 +374,7 @@ static int amdgpu_uvd_cs_msg_decode(uint32_t *msg, unsigned buf_sizes[])
- unsigned height_in_mb = ALIGN(height / 16, 2);
- unsigned fs_in_mb = width_in_mb * height_in_mb;
-
-- unsigned image_size, tmp, min_dpb_size, num_dpb_buffer;
-+ unsigned image_size, tmp, min_dpb_size, num_dpb_buffer, min_ctx_size;
-
- image_size = width * height;
- image_size += image_size / 2;
-@@ -466,6 +466,8 @@ static int amdgpu_uvd_cs_msg_decode(uint32_t *msg, unsigned buf_sizes[])
-
- num_dpb_buffer = (le32_to_cpu(msg[59]) & 0xff) + 2;
- min_dpb_size = image_size * num_dpb_buffer;
-+ min_ctx_size = ((width + 255) / 16) * ((height + 255) / 16)
-+ * 16 * num_dpb_buffer + 52 * 1024;
- break;
-
- default:
-@@ -486,6 +488,7 @@ static int amdgpu_uvd_cs_msg_decode(uint32_t *msg, unsigned buf_sizes[])
-
- buf_sizes[0x1] = dpb_size;
- buf_sizes[0x2] = image_size;
-+ buf_sizes[0x4] = min_ctx_size;
- return 0;
- }
-
-@@ -628,6 +631,13 @@ static int amdgpu_uvd_cs_pass2(struct amdgpu_uvd_cs_ctx *ctx)
- return -EINVAL;
- }
-
-+ } else if (cmd == 0x206) {
-+ if ((end - start) < ctx->buf_sizes[4]) {
-+ DRM_ERROR("buffer (%d) to small (%d / %d)!\n", cmd,
-+ (unsigned)(end - start),
-+ ctx->buf_sizes[4]);
-+ return -EINVAL;
-+ }
- } else if ((cmd != 0x100) && (cmd != 0x204)) {
- DRM_ERROR("invalid UVD command %X!\n", cmd);
- return -EINVAL;
-@@ -755,9 +765,10 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx)
- struct amdgpu_uvd_cs_ctx ctx = {};
- unsigned buf_sizes[] = {
- [0x00000000] = 2048,
-- [0x00000001] = 32 * 1024 * 1024,
-- [0x00000002] = 2048 * 1152 * 3,
-+ [0x00000001] = 0xFFFFFFFF,
-+ [0x00000002] = 0xFFFFFFFF,
- [0x00000003] = 2048,
-+ [0x00000004] = 0xFFFFFFFF,
- };
- struct amdgpu_ib *ib = &parser->ibs[ib_idx];
- int r;
---
-1.9.1
-