diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0337-drm-amdgpu-fix-rb-bitmap-cu-bitmap-calculation.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0337-drm-amdgpu-fix-rb-bitmap-cu-bitmap-calculation.patch | 134 |
1 files changed, 134 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0337-drm-amdgpu-fix-rb-bitmap-cu-bitmap-calculation.patch b/common/recipes-kernel/linux/files/0337-drm-amdgpu-fix-rb-bitmap-cu-bitmap-calculation.patch new file mode 100644 index 00000000..be55999b --- /dev/null +++ b/common/recipes-kernel/linux/files/0337-drm-amdgpu-fix-rb-bitmap-cu-bitmap-calculation.patch @@ -0,0 +1,134 @@ +From 009b73a51358b0ed72610b683f8fe866a8c45fc8 Mon Sep 17 00:00:00 2001 +From: Flora Cui <Flora.Cui@amd.com> +Date: Thu, 3 Mar 2016 12:59:49 +0800 +Subject: [PATCH 0337/1110] drm/amdgpu: fix rb bitmap & cu bitmap calculation + +Fix some copy paste typos. + +Signed-off-by: Flora Cui <Flora.Cui@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/cikd.h | 3 --- + drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 15 +++++++-------- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 9 ++++++--- + drivers/gpu/drm/amd/amdgpu/vid.h | 2 -- + 4 files changed, 13 insertions(+), 16 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/cikd.h b/drivers/gpu/drm/amd/amdgpu/cikd.h +index 7f6d457..60d4493 100644 +--- a/drivers/gpu/drm/amd/amdgpu/cikd.h ++++ b/drivers/gpu/drm/amd/amdgpu/cikd.h +@@ -46,9 +46,6 @@ + #define BONAIRE_GB_ADDR_CONFIG_GOLDEN 0x12010001 + #define HAWAII_GB_ADDR_CONFIG_GOLDEN 0x12011003 + +-#define CIK_RB_BITMAP_WIDTH_PER_SH 2 +-#define HAWAII_RB_BITMAP_WIDTH_PER_SH 4 +- + #define AMDGPU_NUM_OF_VMIDS 8 + + #define PIPEID(x) ((x) << 0) +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +index d0cb200..361ce1b 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +@@ -1637,18 +1637,16 @@ static void gfx_v7_0_setup_rb(struct amdgpu_device *adev) + int i, j; + u32 data; + u32 active_rbs = 0; ++ u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / ++ adev->gfx.config.max_sh_per_se; + + mutex_lock(&adev->grbm_idx_mutex); + for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { + for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { + gfx_v7_0_select_se_sh(adev, i, j); + data = gfx_v7_0_get_rb_active_bitmap(adev); +- if (adev->asic_type == CHIP_HAWAII) +- active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * +- HAWAII_RB_BITMAP_WIDTH_PER_SH); +- else +- active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * +- CIK_RB_BITMAP_WIDTH_PER_SH); ++ active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * ++ rb_bitmap_width_per_sh); + } + } + gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff); +@@ -3833,8 +3831,7 @@ static u32 gfx_v7_0_get_cu_active_bitmap(struct amdgpu_device *adev) + data &= CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS_MASK; + data >>= CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS__SHIFT; + +- mask = gfx_v7_0_create_bitmask(adev->gfx.config.max_backends_per_se / +- adev->gfx.config.max_sh_per_se); ++ mask = gfx_v7_0_create_bitmask(adev->gfx.config.max_cu_per_sh); + + return (~data) & mask; + } +@@ -5245,6 +5242,8 @@ int gfx_v7_0_get_cu_info(struct amdgpu_device *adev, + if (!adev || !cu_info) + return -EINVAL; + ++ memset(cu_info, 0, sizeof(*cu_info)); ++ + mutex_lock(&adev->grbm_idx_mutex); + for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { + for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index fadbfd8..1cda1af 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -2615,6 +2615,8 @@ static void gfx_v8_0_setup_rb(struct amdgpu_device *adev) + int i, j; + u32 data; + u32 active_rbs = 0; ++ u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / ++ adev->gfx.config.max_sh_per_se; + + mutex_lock(&adev->grbm_idx_mutex); + for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { +@@ -2622,7 +2624,7 @@ static void gfx_v8_0_setup_rb(struct amdgpu_device *adev) + gfx_v8_0_select_se_sh(adev, i, j); + data = gfx_v8_0_get_rb_active_bitmap(adev); + active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * +- RB_BITMAP_WIDTH_PER_SH); ++ rb_bitmap_width_per_sh); + } + } + gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff); +@@ -5127,8 +5129,7 @@ static u32 gfx_v8_0_get_cu_active_bitmap(struct amdgpu_device *adev) + data &= CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS_MASK; + data >>= CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS__SHIFT; + +- mask = gfx_v8_0_create_bitmask(adev->gfx.config.max_backends_per_se / +- adev->gfx.config.max_sh_per_se); ++ mask = gfx_v8_0_create_bitmask(adev->gfx.config.max_cu_per_sh); + + return (~data) & mask; + } +@@ -5142,6 +5143,8 @@ int gfx_v8_0_get_cu_info(struct amdgpu_device *adev, + if (!adev || !cu_info) + return -EINVAL; + ++ memset(cu_info, 0, sizeof(*cu_info)); ++ + mutex_lock(&adev->grbm_idx_mutex); + for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { + for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { +diff --git a/drivers/gpu/drm/amd/amdgpu/vid.h b/drivers/gpu/drm/amd/amdgpu/vid.h +index d98aa9d..ace4997 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vid.h ++++ b/drivers/gpu/drm/amd/amdgpu/vid.h +@@ -71,8 +71,6 @@ + #define VMID(x) ((x) << 4) + #define QUEUEID(x) ((x) << 8) + +-#define RB_BITMAP_WIDTH_PER_SH 2 +- + #define MC_SEQ_MISC0__MT__MASK 0xf0000000 + #define MC_SEQ_MISC0__MT__GDDR1 0x10000000 + #define MC_SEQ_MISC0__MT__DDR2 0x20000000 +-- +2.7.4 + |