diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0313-drm-amdgpu-cik-move-uvd-tiling-config-setup-into-uvd.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0313-drm-amdgpu-cik-move-uvd-tiling-config-setup-into-uvd.patch | 86 |
1 files changed, 0 insertions, 86 deletions
diff --git a/common/recipes-kernel/linux/files/0313-drm-amdgpu-cik-move-uvd-tiling-config-setup-into-uvd.patch b/common/recipes-kernel/linux/files/0313-drm-amdgpu-cik-move-uvd-tiling-config-setup-into-uvd.patch deleted file mode 100644 index d748447c..00000000 --- a/common/recipes-kernel/linux/files/0313-drm-amdgpu-cik-move-uvd-tiling-config-setup-into-uvd.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 8a5525bb523ae9fdc29d169bc88d0b33c1a87030 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Fri, 12 Feb 2016 03:12:43 -0500 -Subject: [PATCH 0313/1110] drm/amdgpu/cik: move uvd tiling config setup into - uvd code -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Split uvd and gfx programming. - -Reviewed-by: Christian König <christian.koenig@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 11 ----------- - drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 11 +++++++++++ - 2 files changed, 11 insertions(+), 11 deletions(-) - -diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c -index 7761168..4370daf 100644 ---- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c -@@ -31,8 +31,6 @@ - #include "amdgpu_ucode.h" - #include "clearstate_ci.h" - --#include "uvd/uvd_4_2_d.h" -- - #include "dce/dce_8_0_d.h" - #include "dce/dce_8_0_sh_mask.h" - -@@ -1721,9 +1719,6 @@ static void gfx_v7_0_gpu_init(struct amdgpu_device *adev) - WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); - WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config); - WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config); -- WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); -- WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); -- WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); - - gfx_v7_0_tiling_mode_table_init(adev); - -@@ -4613,12 +4608,6 @@ static void gfx_v7_0_print_status(void *handle) - RREG32(mmHDP_ADDR_CONFIG)); - dev_info(adev->dev, " DMIF_ADDR_CALC=0x%08X\n", - RREG32(mmDMIF_ADDR_CALC)); -- dev_info(adev->dev, " UVD_UDEC_ADDR_CONFIG=0x%08X\n", -- RREG32(mmUVD_UDEC_ADDR_CONFIG)); -- dev_info(adev->dev, " UVD_UDEC_DB_ADDR_CONFIG=0x%08X\n", -- RREG32(mmUVD_UDEC_DB_ADDR_CONFIG)); -- dev_info(adev->dev, " UVD_UDEC_DBW_ADDR_CONFIG=0x%08X\n", -- RREG32(mmUVD_UDEC_DBW_ADDR_CONFIG)); - - dev_info(adev->dev, " CP_MEQ_THRESHOLDS=0x%08X\n", - RREG32(mmCP_MEQ_THRESHOLDS)); -diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c -index d2fc1ca..c606ccb 100644 ---- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c -+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c -@@ -576,6 +576,10 @@ static void uvd_v4_2_mc_resume(struct amdgpu_device *adev) - addr = (adev->uvd.gpu_addr >> 32) & 0xFF; - WREG32(mmUVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31)); - -+ WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); -+ WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); -+ WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); -+ - uvd_v4_2_init_cg(adev); - } - -@@ -777,6 +781,13 @@ static void uvd_v4_2_print_status(void *handle) - RREG32(mmUVD_SEMA_SIGNAL_INCOMPLETE_TIMEOUT_CNTL)); - dev_info(adev->dev, " UVD_CONTEXT_ID=0x%08X\n", - RREG32(mmUVD_CONTEXT_ID)); -+ dev_info(adev->dev, " UVD_UDEC_ADDR_CONFIG=0x%08X\n", -+ RREG32(mmUVD_UDEC_ADDR_CONFIG)); -+ dev_info(adev->dev, " UVD_UDEC_DB_ADDR_CONFIG=0x%08X\n", -+ RREG32(mmUVD_UDEC_DB_ADDR_CONFIG)); -+ dev_info(adev->dev, " UVD_UDEC_DBW_ADDR_CONFIG=0x%08X\n", -+ RREG32(mmUVD_UDEC_DBW_ADDR_CONFIG)); -+ - } - - static int uvd_v4_2_set_interrupt_state(struct amdgpu_device *adev, --- -2.7.4 - |