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-rw-r--r--common/recipes-kernel/linux/files/0312-drm-amdgpu-cik-move-sdma-tiling-config-setup-into-sd.patch68
1 files changed, 68 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0312-drm-amdgpu-cik-move-sdma-tiling-config-setup-into-sd.patch b/common/recipes-kernel/linux/files/0312-drm-amdgpu-cik-move-sdma-tiling-config-setup-into-sd.patch
new file mode 100644
index 00000000..764140a3
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0312-drm-amdgpu-cik-move-sdma-tiling-config-setup-into-sd.patch
@@ -0,0 +1,68 @@
+From a4c6993aca9f5a015f2423776484637586178196 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 12 Feb 2016 03:05:24 -0500
+Subject: [PATCH 0312/1110] drm/amdgpu/cik: move sdma tiling config setup into
+ sdma code
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Split sdma and gfx programming.
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 5 +++++
+ drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 6 ------
+ 2 files changed, 5 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+index fefb365..2bf993c 100644
+--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
++++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+@@ -393,6 +393,9 @@ static int cik_sdma_gfx_resume(struct amdgpu_device *adev)
+ cik_srbm_select(adev, 0, 0, 0, 0);
+ mutex_unlock(&adev->srbm_mutex);
+
++ WREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i],
++ adev->gfx.config.gb_addr_config & 0x70);
++
+ WREG32(mmSDMA0_SEM_INCOMPLETE_TIMER_CNTL + sdma_offsets[i], 0);
+ WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);
+
+@@ -1065,6 +1068,8 @@ static void cik_sdma_print_status(void *handle)
+ i, RREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i]));
+ dev_info(adev->dev, " SDMA%d_GFX_RB_BASE_HI=0x%08X\n",
+ i, RREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i]));
++ dev_info(adev->dev, " SDMA%d_TILING_CONFIG=0x%08X\n",
++ i, RREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i]));
+ mutex_lock(&adev->srbm_mutex);
+ for (j = 0; j < 16; j++) {
+ cik_srbm_select(adev, 0, 0, 0, j);
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+index 501f152..7761168 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+@@ -1721,8 +1721,6 @@ static void gfx_v7_0_gpu_init(struct amdgpu_device *adev)
+ WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
+ WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
+ WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config);
+- WREG32(mmSDMA0_TILING_CONFIG + SDMA0_REGISTER_OFFSET, adev->gfx.config.gb_addr_config & 0x70);
+- WREG32(mmSDMA0_TILING_CONFIG + SDMA1_REGISTER_OFFSET, adev->gfx.config.gb_addr_config & 0x70);
+ WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
+ WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
+ WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
+@@ -4615,10 +4613,6 @@ static void gfx_v7_0_print_status(void *handle)
+ RREG32(mmHDP_ADDR_CONFIG));
+ dev_info(adev->dev, " DMIF_ADDR_CALC=0x%08X\n",
+ RREG32(mmDMIF_ADDR_CALC));
+- dev_info(adev->dev, " SDMA0_TILING_CONFIG=0x%08X\n",
+- RREG32(mmSDMA0_TILING_CONFIG + SDMA0_REGISTER_OFFSET));
+- dev_info(adev->dev, " SDMA1_TILING_CONFIG=0x%08X\n",
+- RREG32(mmSDMA0_TILING_CONFIG + SDMA1_REGISTER_OFFSET));
+ dev_info(adev->dev, " UVD_UDEC_ADDR_CONFIG=0x%08X\n",
+ RREG32(mmUVD_UDEC_ADDR_CONFIG));
+ dev_info(adev->dev, " UVD_UDEC_DB_ADDR_CONFIG=0x%08X\n",
+--
+2.7.4
+