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Diffstat (limited to 'common/recipes-kernel/linux/files/0295-drm-amdgpu-Handle-irqs-only-based-on-irq-ring-not-ir.patch')
-rw-r--r--common/recipes-kernel/linux/files/0295-drm-amdgpu-Handle-irqs-only-based-on-irq-ring-not-ir.patch144
1 files changed, 0 insertions, 144 deletions
diff --git a/common/recipes-kernel/linux/files/0295-drm-amdgpu-Handle-irqs-only-based-on-irq-ring-not-ir.patch b/common/recipes-kernel/linux/files/0295-drm-amdgpu-Handle-irqs-only-based-on-irq-ring-not-ir.patch
deleted file mode 100644
index 67268413..00000000
--- a/common/recipes-kernel/linux/files/0295-drm-amdgpu-Handle-irqs-only-based-on-irq-ring-not-ir.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From bd833144a23dead304744dc748f5d72d7e92d315 Mon Sep 17 00:00:00 2001
-From: Mario Kleiner <mario.kleiner.de@gmail.com>
-Date: Fri, 3 Jul 2015 06:03:07 +0200
-Subject: [PATCH 0295/1050] drm/amdgpu: Handle irqs only based on irq ring, not
- irq status regs.
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This is a translation of the patch ...
-"drm/radeon: Handle irqs only based on irq ring, not irq status regs."
-... for the vblank irq handling, to fix the same problem described
-in that patch on the new driver.
-
-Only compile tested due to lack of suitable hw.
-
-Reviewed-by: Christian König <christian.koenig@amd.com>
-Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
-CC: Michel Dänzer <michel.daenzer@amd.com>
-CC: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
----
- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 22 ++++++++++++++--------
- drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 22 ++++++++++++++--------
- drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 22 ++++++++++++++--------
- 3 files changed, 42 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
-index 5cde635..6e77964 100644
---- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
-+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
-@@ -3403,19 +3403,25 @@ static int dce_v10_0_crtc_irq(struct amdgpu_device *adev,
-
- switch (entry->src_data) {
- case 0: /* vblank */
-- if (disp_int & interrupt_status_offsets[crtc].vblank) {
-+ if (disp_int & interrupt_status_offsets[crtc].vblank)
- dce_v10_0_crtc_vblank_int_ack(adev, crtc);
-- if (amdgpu_irq_enabled(adev, source, irq_type)) {
-- drm_handle_vblank(adev->ddev, crtc);
-- }
-- DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
-+ else
-+ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
-+
-+ if (amdgpu_irq_enabled(adev, source, irq_type)) {
-+ drm_handle_vblank(adev->ddev, crtc);
- }
-+ DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
-+
- break;
- case 1: /* vline */
-- if (disp_int & interrupt_status_offsets[crtc].vline) {
-+ if (disp_int & interrupt_status_offsets[crtc].vline)
- dce_v10_0_crtc_vline_int_ack(adev, crtc);
-- DRM_DEBUG("IH: D%d vline\n", crtc + 1);
-- }
-+ else
-+ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
-+
-+ DRM_DEBUG("IH: D%d vline\n", crtc + 1);
-+
- break;
- default:
- DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data);
-diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
-index 95efd98..7f7abb0 100644
---- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
-+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
-@@ -3402,19 +3402,25 @@ static int dce_v11_0_crtc_irq(struct amdgpu_device *adev,
-
- switch (entry->src_data) {
- case 0: /* vblank */
-- if (disp_int & interrupt_status_offsets[crtc].vblank) {
-+ if (disp_int & interrupt_status_offsets[crtc].vblank)
- dce_v11_0_crtc_vblank_int_ack(adev, crtc);
-- if (amdgpu_irq_enabled(adev, source, irq_type)) {
-- drm_handle_vblank(adev->ddev, crtc);
-- }
-- DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
-+ else
-+ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
-+
-+ if (amdgpu_irq_enabled(adev, source, irq_type)) {
-+ drm_handle_vblank(adev->ddev, crtc);
- }
-+ DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
-+
- break;
- case 1: /* vline */
-- if (disp_int & interrupt_status_offsets[crtc].vline) {
-+ if (disp_int & interrupt_status_offsets[crtc].vline)
- dce_v11_0_crtc_vline_int_ack(adev, crtc);
-- DRM_DEBUG("IH: D%d vline\n", crtc + 1);
-- }
-+ else
-+ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
-+
-+ DRM_DEBUG("IH: D%d vline\n", crtc + 1);
-+
- break;
- default:
- DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data);
-diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
-index aaca8d6..08387df 100644
---- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
-+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
-@@ -3237,19 +3237,25 @@ static int dce_v8_0_crtc_irq(struct amdgpu_device *adev,
-
- switch (entry->src_data) {
- case 0: /* vblank */
-- if (disp_int & interrupt_status_offsets[crtc].vblank) {
-+ if (disp_int & interrupt_status_offsets[crtc].vblank)
- WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], LB_VBLANK_STATUS__VBLANK_ACK_MASK);
-- if (amdgpu_irq_enabled(adev, source, irq_type)) {
-- drm_handle_vblank(adev->ddev, crtc);
-- }
-- DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
-+ else
-+ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
-+
-+ if (amdgpu_irq_enabled(adev, source, irq_type)) {
-+ drm_handle_vblank(adev->ddev, crtc);
- }
-+ DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
-+
- break;
- case 1: /* vline */
-- if (disp_int & interrupt_status_offsets[crtc].vline) {
-+ if (disp_int & interrupt_status_offsets[crtc].vline)
- WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], LB_VLINE_STATUS__VLINE_ACK_MASK);
-- DRM_DEBUG("IH: D%d vline\n", crtc + 1);
-- }
-+ else
-+ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
-+
-+ DRM_DEBUG("IH: D%d vline\n", crtc + 1);
-+
- break;
- default:
- DRM_DEBUG("Unhandled interrupt: %d %d\n", entry->src_id, entry->src_data);
---
-1.9.1
-
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-25 15:44:08 +0000