diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0260-drm-admgpu-move-XDMA-golden-registers-to-dce-code.patch')
-rw-r--r-- | common/recipes-kernel/linux/files/0260-drm-admgpu-move-XDMA-golden-registers-to-dce-code.patch | 93 |
1 files changed, 0 insertions, 93 deletions
diff --git a/common/recipes-kernel/linux/files/0260-drm-admgpu-move-XDMA-golden-registers-to-dce-code.patch b/common/recipes-kernel/linux/files/0260-drm-admgpu-move-XDMA-golden-registers-to-dce-code.patch deleted file mode 100644 index c4438caf..00000000 --- a/common/recipes-kernel/linux/files/0260-drm-admgpu-move-XDMA-golden-registers-to-dce-code.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 5732a94f18cd69331036ab776bdf5e475702e2b4 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Tue, 9 Jun 2015 13:51:25 -0400 -Subject: [PATCH 0260/1050] drm/admgpu: move XDMA golden registers to dce code -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Already moved other display registers. - -Reviewed-by: Christian König <christian.koenig@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 9 +++++++++ - drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 9 +++++++++ - drivers/gpu/drm/amd/amdgpu/vi.c | 4 ---- - 3 files changed, 18 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c -index 926c8e0..192dfe5 100644 ---- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c -@@ -120,11 +120,20 @@ static const u32 golden_settings_tonga_a11[] = - mmHDMI_CONTROL, 0x31000111, 0x00000011, - }; - -+static const u32 tonga_mgcg_cgcg_init[] = -+{ -+ mmXDMA_CLOCK_GATING_CNTL, 0xffffffff, 0x00000100, -+ mmXDMA_MEM_POWER_CNTL, 0x00000101, 0x00000000, -+}; -+ - static void dce_v10_0_init_golden_registers(struct amdgpu_device *adev) - { - switch (adev->asic_type) { - case CHIP_TONGA: - amdgpu_program_register_sequence(adev, -+ tonga_mgcg_cgcg_init, -+ (const u32)ARRAY_SIZE(tonga_mgcg_cgcg_init)); -+ amdgpu_program_register_sequence(adev, - golden_settings_tonga_a11, - (const u32)ARRAY_SIZE(golden_settings_tonga_a11)); - break; -diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c -index bc60fd1..a530c5d 100644 ---- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c -@@ -120,11 +120,20 @@ static const u32 cz_golden_settings_a11[] = - mmFBC_MISC, 0x1f311fff, 0x14300000, - }; - -+static const u32 cz_mgcg_cgcg_init[] = -+{ -+ mmXDMA_CLOCK_GATING_CNTL, 0xffffffff, 0x00000100, -+ mmXDMA_MEM_POWER_CNTL, 0x00000101, 0x00000000, -+}; -+ - static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev) - { - switch (adev->asic_type) { - case CHIP_CARRIZO: - amdgpu_program_register_sequence(adev, -+ cz_mgcg_cgcg_init, -+ (const u32)ARRAY_SIZE(cz_mgcg_cgcg_init)); -+ amdgpu_program_register_sequence(adev, - cz_golden_settings_a11, - (const u32)ARRAY_SIZE(cz_golden_settings_a11)); - break; -diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c -index be7c176..b71f414 100644 ---- a/drivers/gpu/drm/amd/amdgpu/vi.c -+++ b/drivers/gpu/drm/amd/amdgpu/vi.c -@@ -173,8 +173,6 @@ static const u32 tonga_mgcg_cgcg_init[] = - mmPCIE_DATA, 0x000f0000, 0x00000000, - mmSMC_IND_INDEX_4, 0xffffffff, 0xC060000C, - mmSMC_IND_DATA_4, 0xc0000fff, 0x00000100, -- mmXDMA_CLOCK_GATING_CNTL, 0xffffffff, 0x00000100, -- mmXDMA_MEM_POWER_CNTL, 0x00000101, 0x00000000, - mmCGTT_DRM_CLK_CTRL0, 0xff000fff, 0x00000100, - mmHDP_XDP_CGTT_BLK_CTRL, 0xc0000fff, 0x00000104, - }; -@@ -193,8 +191,6 @@ static const u32 cz_mgcg_cgcg_init[] = - mmCGTT_DRM_CLK_CTRL0, 0xffffffff, 0x00600100, - mmPCIE_INDEX, 0xffffffff, 0x0140001c, - mmPCIE_DATA, 0x000f0000, 0x00000000, -- mmXDMA_CLOCK_GATING_CNTL, 0xffffffff, 0x00000100, -- mmXDMA_MEM_POWER_CNTL, 0x00000101, 0x00000000, - mmCGTT_DRM_CLK_CTRL0, 0xff000fff, 0x00000100, - mmHDP_XDP_CGTT_BLK_CTRL, 0xc0000fff, 0x00000104, - }; --- -1.9.1 - |