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-rw-r--r--common/recipes-kernel/linux/files/0203-drm-amdgpu-cz-plumb-pg-flags-through-to-powerplay.patch47
1 files changed, 47 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0203-drm-amdgpu-cz-plumb-pg-flags-through-to-powerplay.patch b/common/recipes-kernel/linux/files/0203-drm-amdgpu-cz-plumb-pg-flags-through-to-powerplay.patch
new file mode 100644
index 00000000..1d5f771b
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0203-drm-amdgpu-cz-plumb-pg-flags-through-to-powerplay.patch
@@ -0,0 +1,47 @@
+From 4c4ba1ed5bccd255e238a718626f9a744dfbd70c Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 5 Feb 2016 11:23:28 -0500
+Subject: [PATCH 0203/1110] drm/amdgpu/cz: plumb pg flags through to powerplay
+
+Enable vce and uvd pg based on single set of pg flags.
+
+Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+index 80af87f..cf01177 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+@@ -174,6 +174,8 @@ static int cz_initialize_dpm_defaults(struct pp_hwmgr *hwmgr)
+ {
+ struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
+ uint32_t i;
++ struct cgs_system_info sys_info = {0};
++ int result;
+
+ cz_hwmgr->gfx_ramp_step = 256*25/100;
+
+@@ -251,6 +253,17 @@ static int cz_initialize_dpm_defaults(struct pp_hwmgr *hwmgr)
+ PHM_PlatformCaps_UVDPowerGating);
+ phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
+ PHM_PlatformCaps_VCEPowerGating);
++ sys_info.size = sizeof(struct cgs_system_info);
++ sys_info.info_id = CGS_SYSTEM_INFO_PG_FLAGS;
++ result = cgs_query_system_info(hwmgr->device, &sys_info);
++ if (!result) {
++ if (sys_info.value & AMD_PG_SUPPORT_UVD)
++ phm_cap_set(hwmgr->platform_descriptor.platformCaps,
++ PHM_PlatformCaps_UVDPowerGating);
++ if (sys_info.value & AMD_PG_SUPPORT_VCE)
++ phm_cap_set(hwmgr->platform_descriptor.platformCaps,
++ PHM_PlatformCaps_VCEPowerGating);
++ }
+
+ return 0;
+ }
+--
+2.7.4
+