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Diffstat (limited to 'common/recipes-kernel/linux/files/0202-drm-amdgpu-tonga-plumb-pg-flags-through-to-powerplay.patch')
-rw-r--r--common/recipes-kernel/linux/files/0202-drm-amdgpu-tonga-plumb-pg-flags-through-to-powerplay.patch51
1 files changed, 51 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0202-drm-amdgpu-tonga-plumb-pg-flags-through-to-powerplay.patch b/common/recipes-kernel/linux/files/0202-drm-amdgpu-tonga-plumb-pg-flags-through-to-powerplay.patch
new file mode 100644
index 00000000..b8d34dbe
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0202-drm-amdgpu-tonga-plumb-pg-flags-through-to-powerplay.patch
@@ -0,0 +1,51 @@
+From 22f6b2b04fa05f9d3334b03159056c185ec5b97c Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 5 Feb 2016 11:11:51 -0500
+Subject: [PATCH 0202/1110] drm/amdgpu/tonga: plumb pg flags through to
+ powerplay
+
+Enable vce and uvd pg based on single set of pg flags.
+
+Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 14 ++++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
+index 69c81c1..980d3bf 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
+@@ -4451,6 +4451,7 @@ int tonga_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
+ pp_atomctrl_gpio_pin_assignment gpio_pin_assignment;
+ struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable);
+ phw_tonga_ulv_parm *ulv;
++ struct cgs_system_info sys_info = {0};
+
+ PP_ASSERT_WITH_CODE((NULL != hwmgr),
+ "Invalid Parameter!", return -1;);
+@@ -4619,10 +4620,19 @@ int tonga_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
+ PHM_PlatformCaps_UVDPowerGating);
+ phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
+ PHM_PlatformCaps_VCEPowerGating);
++ sys_info.size = sizeof(struct cgs_system_info);
++ sys_info.info_id = CGS_SYSTEM_INFO_PG_FLAGS;
++ result = cgs_query_system_info(hwmgr->device, &sys_info);
++ if (!result) {
++ if (sys_info.value & AMD_PG_SUPPORT_UVD)
++ phm_cap_set(hwmgr->platform_descriptor.platformCaps,
++ PHM_PlatformCaps_UVDPowerGating);
++ if (sys_info.value & AMD_PG_SUPPORT_VCE)
++ phm_cap_set(hwmgr->platform_descriptor.platformCaps,
++ PHM_PlatformCaps_VCEPowerGating);
++ }
+
+ if (0 == result) {
+- struct cgs_system_info sys_info = {0};
+-
+ data->is_tlu_enabled = 0;
+ hwmgr->platform_descriptor.hardwareActivityPerformanceLevels =
+ TONGA_MAX_HARDWARE_POWERLEVELS;
+--
+2.7.4
+