diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0201-drma-dmgpu-move-cg-and-pg-flags-into-shared-headers.patch')
-rw-r--r-- | common/recipes-kernel/linux/files/0201-drma-dmgpu-move-cg-and-pg-flags-into-shared-headers.patch | 722 |
1 files changed, 0 insertions, 722 deletions
diff --git a/common/recipes-kernel/linux/files/0201-drma-dmgpu-move-cg-and-pg-flags-into-shared-headers.patch b/common/recipes-kernel/linux/files/0201-drma-dmgpu-move-cg-and-pg-flags-into-shared-headers.patch deleted file mode 100644 index 19646633..00000000 --- a/common/recipes-kernel/linux/files/0201-drma-dmgpu-move-cg-and-pg-flags-into-shared-headers.patch +++ /dev/null @@ -1,722 +0,0 @@ -From ef576c8b7f73984116c416356abd7e80836a8b5c Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Fri, 5 Feb 2016 10:56:22 -0500 -Subject: [PATCH 0201/1110] drma/dmgpu: move cg and pg flags into shared - headers - -So they can be used by powerplay. - -Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/amdgpu/amdgpu.h | 32 ------- - drivers/gpu/drm/amd/amdgpu/cik.c | 154 +++++++++++++++---------------- - drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 +- - drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 6 +- - drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 70 +++++++------- - drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 10 +- - drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 8 +- - drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 6 +- - drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 4 +- - drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 6 +- - drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4 +- - drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 6 +- - drivers/gpu/drm/amd/include/amd_shared.h | 32 +++++++ - 13 files changed, 171 insertions(+), 171 deletions(-) - -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h -index 084f0df..a152e82 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h -@@ -134,38 +134,6 @@ extern unsigned amdgpu_pcie_lane_cap; - #define AMDGPU_RESET_VCE (1 << 13) - #define AMDGPU_RESET_VCE1 (1 << 14) - --/* CG flags */ --#define AMDGPU_CG_SUPPORT_GFX_MGCG (1 << 0) --#define AMDGPU_CG_SUPPORT_GFX_MGLS (1 << 1) --#define AMDGPU_CG_SUPPORT_GFX_CGCG (1 << 2) --#define AMDGPU_CG_SUPPORT_GFX_CGLS (1 << 3) --#define AMDGPU_CG_SUPPORT_GFX_CGTS (1 << 4) --#define AMDGPU_CG_SUPPORT_GFX_CGTS_LS (1 << 5) --#define AMDGPU_CG_SUPPORT_GFX_CP_LS (1 << 6) --#define AMDGPU_CG_SUPPORT_GFX_RLC_LS (1 << 7) --#define AMDGPU_CG_SUPPORT_MC_LS (1 << 8) --#define AMDGPU_CG_SUPPORT_MC_MGCG (1 << 9) --#define AMDGPU_CG_SUPPORT_SDMA_LS (1 << 10) --#define AMDGPU_CG_SUPPORT_SDMA_MGCG (1 << 11) --#define AMDGPU_CG_SUPPORT_BIF_LS (1 << 12) --#define AMDGPU_CG_SUPPORT_UVD_MGCG (1 << 13) --#define AMDGPU_CG_SUPPORT_VCE_MGCG (1 << 14) --#define AMDGPU_CG_SUPPORT_HDP_LS (1 << 15) --#define AMDGPU_CG_SUPPORT_HDP_MGCG (1 << 16) -- --/* PG flags */ --#define AMDGPU_PG_SUPPORT_GFX_PG (1 << 0) --#define AMDGPU_PG_SUPPORT_GFX_SMG (1 << 1) --#define AMDGPU_PG_SUPPORT_GFX_DMG (1 << 2) --#define AMDGPU_PG_SUPPORT_UVD (1 << 3) --#define AMDGPU_PG_SUPPORT_VCE (1 << 4) --#define AMDGPU_PG_SUPPORT_CP (1 << 5) --#define AMDGPU_PG_SUPPORT_GDS (1 << 6) --#define AMDGPU_PG_SUPPORT_RLC_SMU_HS (1 << 7) --#define AMDGPU_PG_SUPPORT_SDMA (1 << 8) --#define AMDGPU_PG_SUPPORT_ACP (1 << 9) --#define AMDGPU_PG_SUPPORT_SAMU (1 << 10) -- - /* GFX current status */ - #define AMDGPU_GFX_NORMAL_MODE 0x00000000L - #define AMDGPU_GFX_SAFE_MODE 0x00000001L -diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c -index 5c978e0..155965e 100644 ---- a/drivers/gpu/drm/amd/amdgpu/cik.c -+++ b/drivers/gpu/drm/amd/amdgpu/cik.c -@@ -2335,72 +2335,72 @@ static int cik_common_early_init(void *handle) - switch (adev->asic_type) { - case CHIP_BONAIRE: - adev->cg_flags = -- AMDGPU_CG_SUPPORT_GFX_MGCG | -- AMDGPU_CG_SUPPORT_GFX_MGLS | -- /*AMDGPU_CG_SUPPORT_GFX_CGCG |*/ -- AMDGPU_CG_SUPPORT_GFX_CGLS | -- AMDGPU_CG_SUPPORT_GFX_CGTS | -- AMDGPU_CG_SUPPORT_GFX_CGTS_LS | -- AMDGPU_CG_SUPPORT_GFX_CP_LS | -- AMDGPU_CG_SUPPORT_MC_LS | -- AMDGPU_CG_SUPPORT_MC_MGCG | -- AMDGPU_CG_SUPPORT_SDMA_MGCG | -- AMDGPU_CG_SUPPORT_SDMA_LS | -- AMDGPU_CG_SUPPORT_BIF_LS | -- AMDGPU_CG_SUPPORT_VCE_MGCG | -- AMDGPU_CG_SUPPORT_UVD_MGCG | -- AMDGPU_CG_SUPPORT_HDP_LS | -- AMDGPU_CG_SUPPORT_HDP_MGCG; -+ AMD_CG_SUPPORT_GFX_MGCG | -+ AMD_CG_SUPPORT_GFX_MGLS | -+ /*AMD_CG_SUPPORT_GFX_CGCG |*/ -+ AMD_CG_SUPPORT_GFX_CGLS | -+ AMD_CG_SUPPORT_GFX_CGTS | -+ AMD_CG_SUPPORT_GFX_CGTS_LS | -+ AMD_CG_SUPPORT_GFX_CP_LS | -+ AMD_CG_SUPPORT_MC_LS | -+ AMD_CG_SUPPORT_MC_MGCG | -+ AMD_CG_SUPPORT_SDMA_MGCG | -+ AMD_CG_SUPPORT_SDMA_LS | -+ AMD_CG_SUPPORT_BIF_LS | -+ AMD_CG_SUPPORT_VCE_MGCG | -+ AMD_CG_SUPPORT_UVD_MGCG | -+ AMD_CG_SUPPORT_HDP_LS | -+ AMD_CG_SUPPORT_HDP_MGCG; - adev->pg_flags = 0; - adev->external_rev_id = adev->rev_id + 0x14; - break; - case CHIP_HAWAII: - adev->cg_flags = -- AMDGPU_CG_SUPPORT_GFX_MGCG | -- AMDGPU_CG_SUPPORT_GFX_MGLS | -- /*AMDGPU_CG_SUPPORT_GFX_CGCG |*/ -- AMDGPU_CG_SUPPORT_GFX_CGLS | -- AMDGPU_CG_SUPPORT_GFX_CGTS | -- AMDGPU_CG_SUPPORT_GFX_CP_LS | -- AMDGPU_CG_SUPPORT_MC_LS | -- AMDGPU_CG_SUPPORT_MC_MGCG | -- AMDGPU_CG_SUPPORT_SDMA_MGCG | -- AMDGPU_CG_SUPPORT_SDMA_LS | -- AMDGPU_CG_SUPPORT_BIF_LS | -- AMDGPU_CG_SUPPORT_VCE_MGCG | -- AMDGPU_CG_SUPPORT_UVD_MGCG | -- AMDGPU_CG_SUPPORT_HDP_LS | -- AMDGPU_CG_SUPPORT_HDP_MGCG; -+ AMD_CG_SUPPORT_GFX_MGCG | -+ AMD_CG_SUPPORT_GFX_MGLS | -+ /*AMD_CG_SUPPORT_GFX_CGCG |*/ -+ AMD_CG_SUPPORT_GFX_CGLS | -+ AMD_CG_SUPPORT_GFX_CGTS | -+ AMD_CG_SUPPORT_GFX_CP_LS | -+ AMD_CG_SUPPORT_MC_LS | -+ AMD_CG_SUPPORT_MC_MGCG | -+ AMD_CG_SUPPORT_SDMA_MGCG | -+ AMD_CG_SUPPORT_SDMA_LS | -+ AMD_CG_SUPPORT_BIF_LS | -+ AMD_CG_SUPPORT_VCE_MGCG | -+ AMD_CG_SUPPORT_UVD_MGCG | -+ AMD_CG_SUPPORT_HDP_LS | -+ AMD_CG_SUPPORT_HDP_MGCG; - adev->pg_flags = 0; - adev->external_rev_id = 0x28; - break; - case CHIP_KAVERI: - adev->cg_flags = -- AMDGPU_CG_SUPPORT_GFX_MGCG | -- AMDGPU_CG_SUPPORT_GFX_MGLS | -- /*AMDGPU_CG_SUPPORT_GFX_CGCG |*/ -- AMDGPU_CG_SUPPORT_GFX_CGLS | -- AMDGPU_CG_SUPPORT_GFX_CGTS | -- AMDGPU_CG_SUPPORT_GFX_CGTS_LS | -- AMDGPU_CG_SUPPORT_GFX_CP_LS | -- AMDGPU_CG_SUPPORT_SDMA_MGCG | -- AMDGPU_CG_SUPPORT_SDMA_LS | -- AMDGPU_CG_SUPPORT_BIF_LS | -- AMDGPU_CG_SUPPORT_VCE_MGCG | -- AMDGPU_CG_SUPPORT_UVD_MGCG | -- AMDGPU_CG_SUPPORT_HDP_LS | -- AMDGPU_CG_SUPPORT_HDP_MGCG; -+ AMD_CG_SUPPORT_GFX_MGCG | -+ AMD_CG_SUPPORT_GFX_MGLS | -+ /*AMD_CG_SUPPORT_GFX_CGCG |*/ -+ AMD_CG_SUPPORT_GFX_CGLS | -+ AMD_CG_SUPPORT_GFX_CGTS | -+ AMD_CG_SUPPORT_GFX_CGTS_LS | -+ AMD_CG_SUPPORT_GFX_CP_LS | -+ AMD_CG_SUPPORT_SDMA_MGCG | -+ AMD_CG_SUPPORT_SDMA_LS | -+ AMD_CG_SUPPORT_BIF_LS | -+ AMD_CG_SUPPORT_VCE_MGCG | -+ AMD_CG_SUPPORT_UVD_MGCG | -+ AMD_CG_SUPPORT_HDP_LS | -+ AMD_CG_SUPPORT_HDP_MGCG; - adev->pg_flags = -- /*AMDGPU_PG_SUPPORT_GFX_PG | -- AMDGPU_PG_SUPPORT_GFX_SMG | -- AMDGPU_PG_SUPPORT_GFX_DMG |*/ -- AMDGPU_PG_SUPPORT_UVD | -- /*AMDGPU_PG_SUPPORT_VCE | -- AMDGPU_PG_SUPPORT_CP | -- AMDGPU_PG_SUPPORT_GDS | -- AMDGPU_PG_SUPPORT_RLC_SMU_HS | -- AMDGPU_PG_SUPPORT_ACP | -- AMDGPU_PG_SUPPORT_SAMU |*/ -+ /*AMD_PG_SUPPORT_GFX_PG | -+ AMD_PG_SUPPORT_GFX_SMG | -+ AMD_PG_SUPPORT_GFX_DMG |*/ -+ AMD_PG_SUPPORT_UVD | -+ /*AMD_PG_SUPPORT_VCE | -+ AMD_PG_SUPPORT_CP | -+ AMD_PG_SUPPORT_GDS | -+ AMD_PG_SUPPORT_RLC_SMU_HS | -+ AMD_PG_SUPPORT_ACP | -+ AMD_PG_SUPPORT_SAMU |*/ - 0; - if (adev->pdev->device == 0x1312 || - adev->pdev->device == 0x1316 || -@@ -2412,29 +2412,29 @@ static int cik_common_early_init(void *handle) - case CHIP_KABINI: - case CHIP_MULLINS: - adev->cg_flags = -- AMDGPU_CG_SUPPORT_GFX_MGCG | -- AMDGPU_CG_SUPPORT_GFX_MGLS | -- /*AMDGPU_CG_SUPPORT_GFX_CGCG |*/ -- AMDGPU_CG_SUPPORT_GFX_CGLS | -- AMDGPU_CG_SUPPORT_GFX_CGTS | -- AMDGPU_CG_SUPPORT_GFX_CGTS_LS | -- AMDGPU_CG_SUPPORT_GFX_CP_LS | -- AMDGPU_CG_SUPPORT_SDMA_MGCG | -- AMDGPU_CG_SUPPORT_SDMA_LS | -- AMDGPU_CG_SUPPORT_BIF_LS | -- AMDGPU_CG_SUPPORT_VCE_MGCG | -- AMDGPU_CG_SUPPORT_UVD_MGCG | -- AMDGPU_CG_SUPPORT_HDP_LS | -- AMDGPU_CG_SUPPORT_HDP_MGCG; -+ AMD_CG_SUPPORT_GFX_MGCG | -+ AMD_CG_SUPPORT_GFX_MGLS | -+ /*AMD_CG_SUPPORT_GFX_CGCG |*/ -+ AMD_CG_SUPPORT_GFX_CGLS | -+ AMD_CG_SUPPORT_GFX_CGTS | -+ AMD_CG_SUPPORT_GFX_CGTS_LS | -+ AMD_CG_SUPPORT_GFX_CP_LS | -+ AMD_CG_SUPPORT_SDMA_MGCG | -+ AMD_CG_SUPPORT_SDMA_LS | -+ AMD_CG_SUPPORT_BIF_LS | -+ AMD_CG_SUPPORT_VCE_MGCG | -+ AMD_CG_SUPPORT_UVD_MGCG | -+ AMD_CG_SUPPORT_HDP_LS | -+ AMD_CG_SUPPORT_HDP_MGCG; - adev->pg_flags = -- /*AMDGPU_PG_SUPPORT_GFX_PG | -- AMDGPU_PG_SUPPORT_GFX_SMG | */ -- AMDGPU_PG_SUPPORT_UVD | -- /*AMDGPU_PG_SUPPORT_VCE | -- AMDGPU_PG_SUPPORT_CP | -- AMDGPU_PG_SUPPORT_GDS | -- AMDGPU_PG_SUPPORT_RLC_SMU_HS | -- AMDGPU_PG_SUPPORT_SAMU |*/ -+ /*AMD_PG_SUPPORT_GFX_PG | -+ AMD_PG_SUPPORT_GFX_SMG | */ -+ AMD_PG_SUPPORT_UVD | -+ /*AMD_PG_SUPPORT_VCE | -+ AMD_PG_SUPPORT_CP | -+ AMD_PG_SUPPORT_GDS | -+ AMD_PG_SUPPORT_RLC_SMU_HS | -+ AMD_PG_SUPPORT_SAMU |*/ - 0; - if (adev->asic_type == CHIP_KABINI) { - if (adev->rev_id == 0) -diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c -index 5f712ce..c55ecf0 100644 ---- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c -+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c -@@ -885,7 +885,7 @@ static void cik_enable_sdma_mgcg(struct amdgpu_device *adev, - { - u32 orig, data; - -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_SDMA_MGCG)) { -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { - WREG32(mmSDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, 0x00000100); - WREG32(mmSDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET, 0x00000100); - } else { -@@ -906,7 +906,7 @@ static void cik_enable_sdma_mgls(struct amdgpu_device *adev, - { - u32 orig, data; - -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_SDMA_LS)) { -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_LS)) { - orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET); - data |= 0x100; - if (orig != data) -diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c -index 4dd17f2..9056355 100644 ---- a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c -+++ b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c -@@ -445,13 +445,13 @@ static int cz_dpm_init(struct amdgpu_device *adev) - pi->gfx_pg_threshold = 500; - pi->caps_fps = true; - /* uvd */ -- pi->caps_uvd_pg = (adev->pg_flags & AMDGPU_PG_SUPPORT_UVD) ? true : false; -+ pi->caps_uvd_pg = (adev->pg_flags & AMD_PG_SUPPORT_UVD) ? true : false; - pi->caps_uvd_dpm = true; - /* vce */ -- pi->caps_vce_pg = (adev->pg_flags & AMDGPU_PG_SUPPORT_VCE) ? true : false; -+ pi->caps_vce_pg = (adev->pg_flags & AMD_PG_SUPPORT_VCE) ? true : false; - pi->caps_vce_dpm = true; - /* acp */ -- pi->caps_acp_pg = (adev->pg_flags & AMDGPU_PG_SUPPORT_ACP) ? true : false; -+ pi->caps_acp_pg = (adev->pg_flags & AMD_PG_SUPPORT_ACP) ? true : false; - pi->caps_acp_dpm = true; - - pi->caps_stable_power_state = false; -diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c -index 96d2073..9b1c430 100644 ---- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c -@@ -4122,7 +4122,7 @@ static void gfx_v7_0_enable_cgcg(struct amdgpu_device *adev, bool enable) - - orig = data = RREG32(mmRLC_CGCG_CGLS_CTRL); - -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_GFX_CGCG)) { -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) { - gfx_v7_0_enable_gui_idle_interrupt(adev, true); - - tmp = gfx_v7_0_halt_rlc(adev); -@@ -4160,9 +4160,9 @@ static void gfx_v7_0_enable_mgcg(struct amdgpu_device *adev, bool enable) - { - u32 data, orig, tmp = 0; - -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_GFX_MGCG)) { -- if (adev->cg_flags & AMDGPU_CG_SUPPORT_GFX_MGLS) { -- if (adev->cg_flags & AMDGPU_CG_SUPPORT_GFX_CP_LS) { -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG)) { -+ if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) { -+ if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CP_LS) { - orig = data = RREG32(mmCP_MEM_SLP_CNTL); - data |= CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK; - if (orig != data) -@@ -4189,14 +4189,14 @@ static void gfx_v7_0_enable_mgcg(struct amdgpu_device *adev, bool enable) - - gfx_v7_0_update_rlc(adev, tmp); - -- if (adev->cg_flags & AMDGPU_CG_SUPPORT_GFX_CGTS) { -+ if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGTS) { - orig = data = RREG32(mmCGTS_SM_CTRL_REG); - data &= ~CGTS_SM_CTRL_REG__SM_MODE_MASK; - data |= (0x2 << CGTS_SM_CTRL_REG__SM_MODE__SHIFT); - data |= CGTS_SM_CTRL_REG__SM_MODE_ENABLE_MASK; - data &= ~CGTS_SM_CTRL_REG__OVERRIDE_MASK; -- if ((adev->cg_flags & AMDGPU_CG_SUPPORT_GFX_MGLS) && -- (adev->cg_flags & AMDGPU_CG_SUPPORT_GFX_CGTS_LS)) -+ if ((adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) && -+ (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGTS_LS)) - data &= ~CGTS_SM_CTRL_REG__LS_OVERRIDE_MASK; - data &= ~CGTS_SM_CTRL_REG__ON_MONITOR_ADD_MASK; - data |= CGTS_SM_CTRL_REG__ON_MONITOR_ADD_EN_MASK; -@@ -4262,7 +4262,7 @@ static void gfx_v7_0_enable_sclk_slowdown_on_pu(struct amdgpu_device *adev, - u32 data, orig; - - orig = data = RREG32(mmRLC_PG_CNTL); -- if (enable && (adev->pg_flags & AMDGPU_PG_SUPPORT_RLC_SMU_HS)) -+ if (enable && (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS)) - data |= RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PU_ENABLE_MASK; - else - data &= ~RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PU_ENABLE_MASK; -@@ -4276,7 +4276,7 @@ static void gfx_v7_0_enable_sclk_slowdown_on_pd(struct amdgpu_device *adev, - u32 data, orig; - - orig = data = RREG32(mmRLC_PG_CNTL); -- if (enable && (adev->pg_flags & AMDGPU_PG_SUPPORT_RLC_SMU_HS)) -+ if (enable && (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS)) - data |= RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK; - else - data &= ~RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK; -@@ -4289,7 +4289,7 @@ static void gfx_v7_0_enable_cp_pg(struct amdgpu_device *adev, bool enable) - u32 data, orig; - - orig = data = RREG32(mmRLC_PG_CNTL); -- if (enable && (adev->pg_flags & AMDGPU_PG_SUPPORT_CP)) -+ if (enable && (adev->pg_flags & AMD_PG_SUPPORT_CP)) - data &= ~0x8000; - else - data |= 0x8000; -@@ -4302,7 +4302,7 @@ static void gfx_v7_0_enable_gds_pg(struct amdgpu_device *adev, bool enable) - u32 data, orig; - - orig = data = RREG32(mmRLC_PG_CNTL); -- if (enable && (adev->pg_flags & AMDGPU_PG_SUPPORT_GDS)) -+ if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GDS)) - data &= ~0x2000; - else - data |= 0x2000; -@@ -4383,7 +4383,7 @@ static void gfx_v7_0_enable_gfx_cgpg(struct amdgpu_device *adev, - { - u32 data, orig; - -- if (enable && (adev->pg_flags & AMDGPU_PG_SUPPORT_GFX_PG)) { -+ if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) { - orig = data = RREG32(mmRLC_PG_CNTL); - data |= RLC_PG_CNTL__GFX_POWER_GATING_ENABLE_MASK; - if (orig != data) -@@ -4455,7 +4455,7 @@ static void gfx_v7_0_enable_gfx_static_mgpg(struct amdgpu_device *adev, - u32 data, orig; - - orig = data = RREG32(mmRLC_PG_CNTL); -- if (enable && (adev->pg_flags & AMDGPU_PG_SUPPORT_GFX_SMG)) -+ if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_SMG)) - data |= RLC_PG_CNTL__STATIC_PER_CU_PG_ENABLE_MASK; - else - data &= ~RLC_PG_CNTL__STATIC_PER_CU_PG_ENABLE_MASK; -@@ -4469,7 +4469,7 @@ static void gfx_v7_0_enable_gfx_dynamic_mgpg(struct amdgpu_device *adev, - u32 data, orig; - - orig = data = RREG32(mmRLC_PG_CNTL); -- if (enable && (adev->pg_flags & AMDGPU_PG_SUPPORT_GFX_DMG)) -+ if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_DMG)) - data |= RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK; - else - data &= ~RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK; -@@ -4636,15 +4636,15 @@ static void gfx_v7_0_get_csb_buffer(struct amdgpu_device *adev, - - static void gfx_v7_0_init_pg(struct amdgpu_device *adev) - { -- if (adev->pg_flags & (AMDGPU_PG_SUPPORT_GFX_PG | -- AMDGPU_PG_SUPPORT_GFX_SMG | -- AMDGPU_PG_SUPPORT_GFX_DMG | -- AMDGPU_PG_SUPPORT_CP | -- AMDGPU_PG_SUPPORT_GDS | -- AMDGPU_PG_SUPPORT_RLC_SMU_HS)) { -+ if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | -+ AMD_PG_SUPPORT_GFX_SMG | -+ AMD_PG_SUPPORT_GFX_DMG | -+ AMD_PG_SUPPORT_CP | -+ AMD_PG_SUPPORT_GDS | -+ AMD_PG_SUPPORT_RLC_SMU_HS)) { - gfx_v7_0_enable_sclk_slowdown_on_pu(adev, true); - gfx_v7_0_enable_sclk_slowdown_on_pd(adev, true); -- if (adev->pg_flags & AMDGPU_PG_SUPPORT_GFX_PG) { -+ if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) { - gfx_v7_0_init_gfx_cgpg(adev); - gfx_v7_0_enable_cp_pg(adev, true); - gfx_v7_0_enable_gds_pg(adev, true); -@@ -4656,14 +4656,14 @@ static void gfx_v7_0_init_pg(struct amdgpu_device *adev) - - static void gfx_v7_0_fini_pg(struct amdgpu_device *adev) - { -- if (adev->pg_flags & (AMDGPU_PG_SUPPORT_GFX_PG | -- AMDGPU_PG_SUPPORT_GFX_SMG | -- AMDGPU_PG_SUPPORT_GFX_DMG | -- AMDGPU_PG_SUPPORT_CP | -- AMDGPU_PG_SUPPORT_GDS | -- AMDGPU_PG_SUPPORT_RLC_SMU_HS)) { -+ if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | -+ AMD_PG_SUPPORT_GFX_SMG | -+ AMD_PG_SUPPORT_GFX_DMG | -+ AMD_PG_SUPPORT_CP | -+ AMD_PG_SUPPORT_GDS | -+ AMD_PG_SUPPORT_RLC_SMU_HS)) { - gfx_v7_0_update_gfx_pg(adev, false); -- if (adev->pg_flags & AMDGPU_PG_SUPPORT_GFX_PG) { -+ if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) { - gfx_v7_0_enable_cp_pg(adev, false); - gfx_v7_0_enable_gds_pg(adev, false); - } -@@ -5540,14 +5540,14 @@ static int gfx_v7_0_set_powergating_state(void *handle, - if (state == AMD_PG_STATE_GATE) - gate = true; - -- if (adev->pg_flags & (AMDGPU_PG_SUPPORT_GFX_PG | -- AMDGPU_PG_SUPPORT_GFX_SMG | -- AMDGPU_PG_SUPPORT_GFX_DMG | -- AMDGPU_PG_SUPPORT_CP | -- AMDGPU_PG_SUPPORT_GDS | -- AMDGPU_PG_SUPPORT_RLC_SMU_HS)) { -+ if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | -+ AMD_PG_SUPPORT_GFX_SMG | -+ AMD_PG_SUPPORT_GFX_DMG | -+ AMD_PG_SUPPORT_CP | -+ AMD_PG_SUPPORT_GDS | -+ AMD_PG_SUPPORT_RLC_SMU_HS)) { - gfx_v7_0_update_gfx_pg(adev, gate); -- if (adev->pg_flags & AMDGPU_PG_SUPPORT_GFX_PG) { -+ if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) { - gfx_v7_0_enable_cp_pg(adev, gate); - gfx_v7_0_enable_gds_pg(adev, gate); - } -diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c -index c1a4ec8..c01b861 100644 ---- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c -@@ -792,7 +792,7 @@ static void gmc_v7_0_enable_mc_ls(struct amdgpu_device *adev, - - for (i = 0; i < ARRAY_SIZE(mc_cg_registers); i++) { - orig = data = RREG32(mc_cg_registers[i]); -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_MC_LS)) -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_LS)) - data |= mc_cg_ls_en[i]; - else - data &= ~mc_cg_ls_en[i]; -@@ -809,7 +809,7 @@ static void gmc_v7_0_enable_mc_mgcg(struct amdgpu_device *adev, - - for (i = 0; i < ARRAY_SIZE(mc_cg_registers); i++) { - orig = data = RREG32(mc_cg_registers[i]); -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_MC_MGCG)) -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG)) - data |= mc_cg_en[i]; - else - data &= ~mc_cg_en[i]; -@@ -825,7 +825,7 @@ static void gmc_v7_0_enable_bif_mgls(struct amdgpu_device *adev, - - orig = data = RREG32_PCIE(ixPCIE_CNTL2); - -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_BIF_LS)) { -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS)) { - data = REG_SET_FIELD(data, PCIE_CNTL2, SLV_MEM_LS_EN, 1); - data = REG_SET_FIELD(data, PCIE_CNTL2, MST_MEM_LS_EN, 1); - data = REG_SET_FIELD(data, PCIE_CNTL2, REPLAY_MEM_LS_EN, 1); -@@ -848,7 +848,7 @@ static void gmc_v7_0_enable_hdp_mgcg(struct amdgpu_device *adev, - - orig = data = RREG32(mmHDP_HOST_PATH_CNTL); - -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_HDP_MGCG)) -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) - data = REG_SET_FIELD(data, HDP_HOST_PATH_CNTL, CLOCK_GATING_DIS, 0); - else - data = REG_SET_FIELD(data, HDP_HOST_PATH_CNTL, CLOCK_GATING_DIS, 1); -@@ -864,7 +864,7 @@ static void gmc_v7_0_enable_hdp_ls(struct amdgpu_device *adev, - - orig = data = RREG32(mmHDP_MEM_POWER_LS); - -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_HDP_LS)) -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_LS)) - data = REG_SET_FIELD(data, HDP_MEM_POWER_LS, LS_ENABLE, 1); - else - data = REG_SET_FIELD(data, HDP_MEM_POWER_LS, LS_ENABLE, 0); -diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c -index 7e9154c..654d767 100644 ---- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c -+++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c -@@ -2859,11 +2859,11 @@ static int kv_dpm_init(struct amdgpu_device *adev) - pi->voltage_drop_t = 0; - pi->caps_sclk_throttle_low_notification = false; - pi->caps_fps = false; /* true? */ -- pi->caps_uvd_pg = (adev->pg_flags & AMDGPU_PG_SUPPORT_UVD) ? true : false; -+ pi->caps_uvd_pg = (adev->pg_flags & AMD_PG_SUPPORT_UVD) ? true : false; - pi->caps_uvd_dpm = true; -- pi->caps_vce_pg = (adev->pg_flags & AMDGPU_PG_SUPPORT_VCE) ? true : false; -- pi->caps_samu_pg = (adev->pg_flags & AMDGPU_PG_SUPPORT_SAMU) ? true : false; -- pi->caps_acp_pg = (adev->pg_flags & AMDGPU_PG_SUPPORT_ACP) ? true : false; -+ pi->caps_vce_pg = (adev->pg_flags & AMD_PG_SUPPORT_VCE) ? true : false; -+ pi->caps_samu_pg = (adev->pg_flags & AMD_PG_SUPPORT_SAMU) ? true : false; -+ pi->caps_acp_pg = (adev->pg_flags & AMD_PG_SUPPORT_ACP) ? true : false; - pi->caps_stable_p_state = false; - - ret = kv_parse_sys_info_table(adev); -diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c -index c982524..fbd3767 100644 ---- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c -+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c -@@ -611,7 +611,7 @@ static void uvd_v4_2_enable_mgcg(struct amdgpu_device *adev, - { - u32 orig, data; - -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_UVD_MGCG)) { -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG)) { - data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL); - data = 0xfff; - WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); -@@ -830,7 +830,7 @@ static int uvd_v4_2_set_clockgating_state(void *handle, - bool gate = false; - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - -- if (!(adev->cg_flags & AMDGPU_CG_SUPPORT_UVD_MGCG)) -+ if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG)) - return 0; - - if (state == AMD_CG_STATE_GATE) -@@ -853,7 +853,7 @@ static int uvd_v4_2_set_powergating_state(void *handle, - */ - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - -- if (!(adev->pg_flags & AMDGPU_PG_SUPPORT_UVD)) -+ if (!(adev->pg_flags & AMD_PG_SUPPORT_UVD)) - return 0; - - if (state == AMD_PG_STATE_GATE) { -diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c -index aad1ab5..57f1c5b 100644 ---- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c -@@ -776,7 +776,7 @@ static int uvd_v5_0_set_clockgating_state(void *handle, - { - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - -- if (!(adev->cg_flags & AMDGPU_CG_SUPPORT_UVD_MGCG)) -+ if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG)) - return 0; - - return 0; -@@ -794,7 +794,7 @@ static int uvd_v5_0_set_powergating_state(void *handle, - */ - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - -- if (!(adev->pg_flags & AMDGPU_PG_SUPPORT_UVD)) -+ if (!(adev->pg_flags & AMD_PG_SUPPORT_UVD)) - return 0; - - if (state == AMD_PG_STATE_GATE) { -diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c -index c41eda7..0b365b7 100644 ---- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c -@@ -532,7 +532,7 @@ static int uvd_v6_0_start(struct amdgpu_device *adev) - uvd_v6_0_mc_resume(adev); - - /* Set dynamic clock gating in S/W control mode */ -- if (adev->cg_flags & AMDGPU_CG_SUPPORT_UVD_MGCG) { -+ if (adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG) { - if (adev->flags & AMD_IS_APU) - cz_set_uvd_clock_gating_branches(adev, false); - else -@@ -1000,7 +1000,7 @@ static int uvd_v6_0_set_clockgating_state(void *handle, - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - bool enable = (state == AMD_CG_STATE_GATE) ? true : false; - -- if (!(adev->cg_flags & AMDGPU_CG_SUPPORT_UVD_MGCG)) -+ if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG)) - return 0; - - if (enable) { -@@ -1030,7 +1030,7 @@ static int uvd_v6_0_set_powergating_state(void *handle, - */ - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - -- if (!(adev->pg_flags & AMDGPU_PG_SUPPORT_UVD)) -+ if (!(adev->pg_flags & AMD_PG_SUPPORT_UVD)) - return 0; - - if (state == AMD_PG_STATE_GATE) { -diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c -index d3ce608..a822eda 100644 ---- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c -@@ -373,7 +373,7 @@ static void vce_v2_0_enable_mgcg(struct amdgpu_device *adev, bool enable) - { - bool sw_cg = false; - -- if (enable && (adev->cg_flags & AMDGPU_CG_SUPPORT_VCE_MGCG)) { -+ if (enable && (adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)) { - if (sw_cg) - vce_v2_0_set_sw_cg(adev, true); - else -@@ -608,7 +608,7 @@ static int vce_v2_0_set_powergating_state(void *handle, - */ - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - -- if (!(adev->pg_flags & AMDGPU_PG_SUPPORT_VCE)) -+ if (!(adev->pg_flags & AMD_PG_SUPPORT_VCE)) - return 0; - - if (state == AMD_PG_STATE_GATE) -diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c -index 797d12c..d662fa9 100644 ---- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c -@@ -277,7 +277,7 @@ static int vce_v3_0_start(struct amdgpu_device *adev) - WREG32_P(mmVCE_STATUS, 0, ~1); - - /* Set Clock-Gating off */ -- if (adev->cg_flags & AMDGPU_CG_SUPPORT_VCE_MGCG) -+ if (adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG) - vce_v3_0_set_vce_sw_clock_gating(adev, false); - - if (r) { -@@ -676,7 +676,7 @@ static int vce_v3_0_set_clockgating_state(void *handle, - bool enable = (state == AMD_CG_STATE_GATE) ? true : false; - int i; - -- if (!(adev->cg_flags & AMDGPU_CG_SUPPORT_VCE_MGCG)) -+ if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)) - return 0; - - mutex_lock(&adev->grbm_idx_mutex); -@@ -728,7 +728,7 @@ static int vce_v3_0_set_powergating_state(void *handle, - */ - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - -- if (!(adev->pg_flags & AMDGPU_PG_SUPPORT_VCE)) -+ if (!(adev->pg_flags & AMD_PG_SUPPORT_VCE)) - return 0; - - if (state == AMD_PG_STATE_GATE) -diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h -index 1195d06..dbf7e64 100644 ---- a/drivers/gpu/drm/amd/include/amd_shared.h -+++ b/drivers/gpu/drm/amd/include/amd_shared.h -@@ -85,6 +85,38 @@ enum amd_powergating_state { - AMD_PG_STATE_UNGATE, - }; - -+/* CG flags */ -+#define AMD_CG_SUPPORT_GFX_MGCG (1 << 0) -+#define AMD_CG_SUPPORT_GFX_MGLS (1 << 1) -+#define AMD_CG_SUPPORT_GFX_CGCG (1 << 2) -+#define AMD_CG_SUPPORT_GFX_CGLS (1 << 3) -+#define AMD_CG_SUPPORT_GFX_CGTS (1 << 4) -+#define AMD_CG_SUPPORT_GFX_CGTS_LS (1 << 5) -+#define AMD_CG_SUPPORT_GFX_CP_LS (1 << 6) -+#define AMD_CG_SUPPORT_GFX_RLC_LS (1 << 7) -+#define AMD_CG_SUPPORT_MC_LS (1 << 8) -+#define AMD_CG_SUPPORT_MC_MGCG (1 << 9) -+#define AMD_CG_SUPPORT_SDMA_LS (1 << 10) -+#define AMD_CG_SUPPORT_SDMA_MGCG (1 << 11) -+#define AMD_CG_SUPPORT_BIF_LS (1 << 12) -+#define AMD_CG_SUPPORT_UVD_MGCG (1 << 13) -+#define AMD_CG_SUPPORT_VCE_MGCG (1 << 14) -+#define AMD_CG_SUPPORT_HDP_LS (1 << 15) -+#define AMD_CG_SUPPORT_HDP_MGCG (1 << 16) -+ -+/* PG flags */ -+#define AMD_PG_SUPPORT_GFX_PG (1 << 0) -+#define AMD_PG_SUPPORT_GFX_SMG (1 << 1) -+#define AMD_PG_SUPPORT_GFX_DMG (1 << 2) -+#define AMD_PG_SUPPORT_UVD (1 << 3) -+#define AMD_PG_SUPPORT_VCE (1 << 4) -+#define AMD_PG_SUPPORT_CP (1 << 5) -+#define AMD_PG_SUPPORT_GDS (1 << 6) -+#define AMD_PG_SUPPORT_RLC_SMU_HS (1 << 7) -+#define AMD_PG_SUPPORT_SDMA (1 << 8) -+#define AMD_PG_SUPPORT_ACP (1 << 9) -+#define AMD_PG_SUPPORT_SAMU (1 << 10) -+ - enum amd_pm_state_type { - /* not used for dpm */ - POWER_STATE_TYPE_DEFAULT, --- -2.7.4 - |