aboutsummaryrefslogtreecommitdiffstats
path: root/common/recipes-kernel/linux/files/0185-drm-amdgpu-gfx7-enable-cp-inst-reg-error-interrupts.patch
diff options
context:
space:
mode:
Diffstat (limited to 'common/recipes-kernel/linux/files/0185-drm-amdgpu-gfx7-enable-cp-inst-reg-error-interrupts.patch')
-rw-r--r--common/recipes-kernel/linux/files/0185-drm-amdgpu-gfx7-enable-cp-inst-reg-error-interrupts.patch66
1 files changed, 66 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0185-drm-amdgpu-gfx7-enable-cp-inst-reg-error-interrupts.patch b/common/recipes-kernel/linux/files/0185-drm-amdgpu-gfx7-enable-cp-inst-reg-error-interrupts.patch
new file mode 100644
index 00000000..8f6ea3eb
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0185-drm-amdgpu-gfx7-enable-cp-inst-reg-error-interrupts.patch
@@ -0,0 +1,66 @@
+From 77d676c5a0592361bfda36993ecde349d1c816fc Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Tue, 2 Feb 2016 14:46:48 -0500
+Subject: [PATCH 0185/1110] drm/amdgpu/gfx7: enable cp inst/reg error
+ interrupts
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Enable CP register/instruction error interrupts. Useful
+for debugging command stream problems.
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 20 +++++++++++++++++++-
+ 1 file changed, 19 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+index 9463007..96d2073 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+@@ -4751,6 +4751,22 @@ static int gfx_v7_0_early_init(void *handle)
+ return 0;
+ }
+
++static int gfx_v7_0_late_init(void *handle)
++{
++ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
++ int r;
++
++ r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0);
++ if (r)
++ return r;
++
++ r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0);
++ if (r)
++ return r;
++
++ return 0;
++}
++
+ static int gfx_v7_0_sw_init(void *handle)
+ {
+ struct amdgpu_ring *ring;
+@@ -4903,6 +4919,8 @@ static int gfx_v7_0_hw_fini(void *handle)
+ {
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
++ amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
++ amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
+ gfx_v7_0_cp_enable(adev, false);
+ gfx_v7_0_rlc_stop(adev);
+ gfx_v7_0_fini_pg(adev);
+@@ -5540,7 +5558,7 @@ static int gfx_v7_0_set_powergating_state(void *handle,
+
+ const struct amd_ip_funcs gfx_v7_0_ip_funcs = {
+ .early_init = gfx_v7_0_early_init,
+- .late_init = NULL,
++ .late_init = gfx_v7_0_late_init,
+ .sw_init = gfx_v7_0_sw_init,
+ .sw_fini = gfx_v7_0_sw_fini,
+ .hw_init = gfx_v7_0_hw_init,
+--
+2.7.4
+