diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0170-drm-amdgpu-cz-add-code-to-enable-forcing-VCE-clocks.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0170-drm-amdgpu-cz-add-code-to-enable-forcing-VCE-clocks.patch | 150 |
1 files changed, 150 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0170-drm-amdgpu-cz-add-code-to-enable-forcing-VCE-clocks.patch b/common/recipes-kernel/linux/files/0170-drm-amdgpu-cz-add-code-to-enable-forcing-VCE-clocks.patch new file mode 100644 index 00000000..adb6994e --- /dev/null +++ b/common/recipes-kernel/linux/files/0170-drm-amdgpu-cz-add-code-to-enable-forcing-VCE-clocks.patch @@ -0,0 +1,150 @@ +From 08a5aab8c32a3234d0487f9348170e6eda821287 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Fri, 18 Dec 2015 11:25:16 -0500 +Subject: [PATCH 0170/1110] drm/amdgpu/cz: add code to enable forcing VCE + clocks +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +VCE DPM works similarly to SCLK DPM. Add a similar interface +for VCE for forcing the VCE clocks. + +Reviewed-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 98 ++++++++++++++++++++++++++++++++++++- + drivers/gpu/drm/amd/amdgpu/cz_dpm.h | 1 + + 2 files changed, 98 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c +index 5ccea9f..02cba49 100644 +--- a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c +@@ -1770,7 +1770,6 @@ static int cz_dpm_unforce_dpm_levels(struct amdgpu_device *adev) + return 0; + } + +- + static int cz_dpm_uvd_force_highest(struct amdgpu_device *adev) + { + struct cz_power_info *pi = cz_get_pi(adev); +@@ -1868,6 +1867,103 @@ static int cz_dpm_unforce_uvd_dpm_levels(struct amdgpu_device *adev) + return 0; + } + ++static int cz_dpm_vce_force_highest(struct amdgpu_device *adev) ++{ ++ struct cz_power_info *pi = cz_get_pi(adev); ++ int ret = 0; ++ ++ if (pi->vce_dpm.soft_min_clk != pi->vce_dpm.soft_max_clk) { ++ pi->vce_dpm.soft_min_clk = ++ pi->vce_dpm.soft_max_clk; ++ ret = cz_send_msg_to_smc_with_parameter(adev, ++ PPSMC_MSG_SetEclkSoftMin, ++ cz_get_eclk_level(adev, ++ pi->vce_dpm.soft_min_clk, ++ PPSMC_MSG_SetEclkSoftMin)); ++ if (ret) ++ return ret; ++ } ++ ++ return ret; ++} ++ ++static int cz_dpm_vce_force_lowest(struct amdgpu_device *adev) ++{ ++ struct cz_power_info *pi = cz_get_pi(adev); ++ int ret = 0; ++ ++ if (pi->vce_dpm.soft_max_clk != pi->vce_dpm.soft_min_clk) { ++ pi->vce_dpm.soft_max_clk = pi->vce_dpm.soft_min_clk; ++ ret = cz_send_msg_to_smc_with_parameter(adev, ++ PPSMC_MSG_SetEclkSoftMax, ++ cz_get_uvd_level(adev, ++ pi->vce_dpm.soft_max_clk, ++ PPSMC_MSG_SetEclkSoftMax)); ++ if (ret) ++ return ret; ++ } ++ ++ return ret; ++} ++ ++static uint32_t cz_dpm_get_max_vce_level(struct amdgpu_device *adev) ++{ ++ struct cz_power_info *pi = cz_get_pi(adev); ++ ++ if (!pi->max_vce_level) { ++ cz_send_msg_to_smc(adev, PPSMC_MSG_GetMaxEclkLevel); ++ pi->max_vce_level = cz_get_argument(adev) + 1; ++ } ++ ++ if (pi->max_vce_level > CZ_MAX_HARDWARE_POWERLEVELS) { ++ DRM_ERROR("Invalid max vce level!\n"); ++ return -EINVAL; ++ } ++ ++ return pi->max_vce_level; ++} ++ ++static int cz_dpm_unforce_vce_dpm_levels(struct amdgpu_device *adev) ++{ ++ struct cz_power_info *pi = cz_get_pi(adev); ++ struct amdgpu_vce_clock_voltage_dependency_table *dep_table = ++ &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; ++ uint32_t level = 0; ++ int ret = 0; ++ ++ pi->vce_dpm.soft_min_clk = dep_table->entries[0].ecclk; ++ level = cz_dpm_get_max_vce_level(adev) - 1; ++ if (level < dep_table->count) ++ pi->vce_dpm.soft_max_clk = dep_table->entries[level].ecclk; ++ else ++ pi->vce_dpm.soft_max_clk = ++ dep_table->entries[dep_table->count - 1].ecclk; ++ ++ /* get min/max sclk soft value ++ * notify SMU to execute */ ++ ret = cz_send_msg_to_smc_with_parameter(adev, ++ PPSMC_MSG_SetEclkSoftMin, ++ cz_get_eclk_level(adev, ++ pi->vce_dpm.soft_min_clk, ++ PPSMC_MSG_SetEclkSoftMin)); ++ if (ret) ++ return ret; ++ ++ ret = cz_send_msg_to_smc_with_parameter(adev, ++ PPSMC_MSG_SetEclkSoftMax, ++ cz_get_eclk_level(adev, ++ pi->vce_dpm.soft_max_clk, ++ PPSMC_MSG_SetEclkSoftMax)); ++ if (ret) ++ return ret; ++ ++ DRM_DEBUG("DPM vce unforce state min=%d, max=%d.\n", ++ pi->vce_dpm.soft_min_clk, ++ pi->vce_dpm.soft_max_clk); ++ ++ return 0; ++} ++ + static int cz_dpm_force_dpm_level(struct amdgpu_device *adev, + enum amdgpu_dpm_forced_level level) + { +diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.h b/drivers/gpu/drm/amd/amdgpu/cz_dpm.h +index 6a6a6fe..5df8c1f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/cz_dpm.h ++++ b/drivers/gpu/drm/amd/amdgpu/cz_dpm.h +@@ -184,6 +184,7 @@ struct cz_power_info { + uint32_t gfx_pg_threshold; + uint32_t max_sclk_level; + uint32_t max_uvd_level; ++ uint32_t max_vce_level; + /* flags */ + bool didt_enabled; + bool video_start; +-- +2.7.4 + |